Denon-AVR4806-avr-sm维修电路原理图.pdf

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1、SERVICE MANUAL AV SURROUND RECEIVER MODELAVR-4806 AV SURROUND AMPLIFIER MODELAVC-A11XV For U.S.A., Canada, Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Le

2、vel at reset “Z”= Becomes High impedance mode at reset STBY: State of port when STANDBY mode. “O/L” = Output port and “L” “I”= Input port Stop: State of port when Stop mode. “O/L”= Output port and “L” “I”= Input port 28 AVR-4806 / AVC-A11XV M30627FHPGP (IC901) CONNECT P.W.B. M30625FGPGP Terminal Fun

3、ction PinPin NameSymbolI/OTypeDet Op (Int.) Op (Ext.) ResSTBYstopFUNCTION 1VREFVREF-AD ref. +5V 2AVCCAVCC-AD +5V 3P97/SIN4Z1 OSD STBOC-ZO/LO/LMAIN OSD control pin 4P96/SOUT4Z1 OSD DATAOC-ZO/LO/LMAIN OSD control pin 5P95/CLK4Z1 OSD CLKOC-ZO/LO/LMAIN OSD control pin 6P94NCOC-ZO/LO/LNot used 7P93NCOC-Z

4、O/LO/LNot used 8P92/SOUT3NCOC-ZO/LO/LNot used 9P91/SIN3NCOC-ZO/LO/LNot used 10P90/CLK3NCOC-ZO/LO/LNot used 11P141NCOC-ZO/LO/LNot used 12P140NCOC-ZO/LO/LNot used 13BYTEBYTE-GND (Ext. data bus bit width switching, 16bit: L) 14CNVCSCNVSS-Ed-Single-chip/Micro-processor mode switching (Normal single-chip

5、: L, Rewrite boot program start:H input set) 15P87TE RSTOC-ZO/LO/LCOMPONENT FORMAT DETECTOR reset (TE8200PF) 16P86NCOC-ZO/LO/LNot used 17RESET _RESETI-Lv-EuLIIReset input (Reset: L) 18XOUTX1O-Oscillator connection 19VSSVSS-GND 20XINX2I-IIOscillator connection 21VCC1VCC1-+5V 22P85/NMI_NMII-Not used (

6、Fixed to H) 23P84/INT2INTI- E Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset STBY: State of port wh

7、en STANDBY mode. “O/L” = Output port and “L” “I”= Input port Stop: State of port when Stop mode. “O/L”= Output port and “L” “I”= Input port 31 AVR-4806 / AVC-A11XV M30835FJGP (IC409) CONNECT P.W.B. M30835FJGP Terminal Function PinPin NameSymbolI/OTypeDet Op (Int.) Op (Ext.) ResSTBYstopFUNCTION 1P96/

8、TXD4(XMI TxD)OC-ZO/LO/LNot used (XM RADIO control pin) 2P95/CLK4(XMO1)OC-ZO/LO/LNot used (XM RADIO control pin) 3P94/CTS4(XMO2)OC-ZO/LO/LNot used (XM RADIO control pin) 4P93/CTS3(XM POWER)OC-ZO/LO/LNot used (XM RADIO power control pin) 5P92/TXD3/SDA3ETI RxDOC-ZO/LO/LETHERNET UART control pin 6P91/RX

9、D3/SCL3ETO TxdI-Lv-ZIO/LETHERNET UART control pin 7P90/CLK3H/P RELAYOC-EdZO/LO/LHEADPHONE RELAY control pin 8P146RSTVOC-EdZO/LO/L VIDEO-com reset output 9P145SW5V POWEROC-EdZO/LO/LSW5V POWER control pin (Same as MAIN POWER PORT) 10P144(PRE POWER -B)OC-EdZO/LO/L(PRE -B Power Relay conerol pin (H:Afte

10、r 100ms from P141:PRE POWER +B =H) 11P143MUTE POWEROC-EdZO/LO/LMuting ON:H (30msec before POWER ON), OFF:L(Same timing as POWER OFF) 12P142BD3811 POWEROC-EdZO/LO/LZONE +B control pin (H:After 100ms from P144:PRE POWER -B=H) 13P141SUB CPU POWEROC-ZO/LO/L SUB-com power on/off switching(ON:H) 14P140232

11、C POWEROC-EdZO/HO/L232C POWER control pin (STANDBY:H) 15BYTEBYTE-GND(Ext. data bus bit width switching,16bit:L) 16CNVssCNVSSI-Ed-Single-chip/Micro-processor mode switching (Normal singlechip: L, Rewrite boot program start:H input set) 17P87/XCINMAIN POWEROC-EdZO/LO/LPOWER relay control output (H:ON)

12、 32 AVR-4806 / AVC-A11XV 18P86/XCOUTRUSH POWEROC-EdZO/LO/LPOWER Relay control pin (H:After 500ms from P87:MAIN POWER=H) 19RESETRESETI-Lv-EuLIIReset input (Reset=L) 20XOUTX2O-Oscillator connection 21VSSVSS-GND 22XINX1I-IIOscillator connection 23VCCVCC-+5V 24P85/NMI_NMII-Not used(Fixed to H) 25P84/INT

13、2B.DOWNI- E Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset STBY: State of port when STANDBY mode. “

14、O/L” = Output port and “L” “I”= Input port Stop: State of port when Stop mode. “O/L”= Output port and “L” “I”= Input port 34 AVR-4806 / AVC-A11XV BU4094BCF-E2 (IC404) CONNECT P.W.B. (IC501-503) AUDIO P.W.B. BU4094BCF-E2 Terminal Function PortSymbolFunction IC404 EXP1T1TRIGGER OUT 1 control pin EXP2T

15、2TRIGGER OUT 2 control pin EXP3T3TRIGGER OUT 3 control pin EXP4NCNot used EXP5(ADINRL)(AD IN RELAY control pin) EXP6(XMPOWER)(XM POWER control pin) EXP7(XMDACRST)(XM DAC control pin) EXP8NCNC IC501 EXP9F MUTEPREOUT MUTE control pin EXP10C MUTEPREOUT MUTE control pin EXP11SW MUTEPREOUT MUTE control p

16、in EXP12SRL MUTEPREOUT MUTE control pin EXP13SRR MUTEPREOUT MUTE control pin EXP14SBL MUTEPREOUT MUTE control pin EXP15SBR MUTEPREOUT MUTE control pin EXP16FVR MUTEVOL MUTE control pin IC502 EXP17CVR MUTEVOL MUTE control pin EXP18(EXVR MUTE)Not used (VOL MUTE control pin) EXP19SRL VR MUTEVOL MUTE co

17、ntrol pin EXP20SRR VR MUTEVOL MUTE control pin EXP21SBL VR MUTEVOL MUTE control pin EXP22SBR VR MUTEVOL MUTE control pin EXP23F-RLSPEAKER RELAY control pin EXP24C-RLSPEAKER RELAY control pin IC503 EXP25(EX-RL)Not used (SPEAKER RELAY control pin) EXP26SRR_A-RLSPEAKER RELAY control pin EXP27SRR_B-RLSP

18、EAKER RELAY control pin EXP28SBL-RLSPEAKER RELAY control pin EXP29SBR-RLSPEAKER RELAY control pin EXP30Z3 MUTEZONE3 MUTE control pin EXP31Z2 MUTEZONE2 MUTE control pin EXP32H/P MUTEHEADPHONE MUTE control pin STROBE 1 2 3 4 5 6 7 89 10 11 16 15 14 13 12 DATA CLOCK Q1 Q2 Q3 Q4 VSS VDD OE Q5 Q6 Q7 Q8 Q

19、S QS 35 AVR-4806 / AVC-A11XV BU4094BCFV-E2 (IC106,107) CONNECT P.W.B. (IC302,304,305,307) A.VIDEO P.W.B. BU4094BCFV-E2 Terminal Function PortSymbolFunction IC106 CV-EXP1V1INMAIN ZONE COMPONENT SELECT CV-EXP2V2INMAIN ZONE COMPONENT SELECT CV-EXP3V3INMAIN ZONE COMPONENT SELECT CV-EXP4V4INMAIN ZONE COM

20、PONENT SELECT CV-EXP5MONI V1 COMPONENTCONPONENT MONITOR 1 control pin CV-EXP6MONI V2 COMPONENTCONPONENT MONITOR 2 control pin CV-EXP7ASPECT_HASPECT ratio level control pin CV-EXP8ASPECT_LASPECT ratio level control pin IC107 CV-EXP9MONI1 DISCOMPONENT MONITOR 1 DISABLE control pin CV-EXP10MONI2 DISCOM

21、PONENT MONITOR 2 DISABLE control pin CV-EXP11BHMUTEBH7868F MUTE (S/CVBS output) CV-EXP12INH LINED connector LINE control pin CV-EXP13LINEAD connector LINE control pin CV-EXP14LINEBD connector LINE control pin CV-EXP15PSCOMPONENY CONVERT MUTE CV-EXP16Y/CVBSVIDEO DECODER input select IC302 SV-EXP1VCR1

22、INHVCR1INH SV-EXP2VCR2INHVCR2INH SV-EXP3VCR3INHVCR3INH SV-EXP4INAINPUT SELECT SV-EXP5INBINPUT SELECT SV-EXP6INCINPUT SELECT SV-EXP7Z2AZONE2 SELECT SV-EXP8Z2BZONE2 SELECT IC304 SV-EXP9Z2CZONE2 SELECT SV-EXP10RECARECOUT SELECT SV-EXP11RECBRECOUT SELECT SV-EXP12RECCRECOUT SELECT SV-EXP13Z1ININHINPUT SE

23、LECT SV-EXP14Z2ININHZONE2 SELECT SV-EXP15RECININHRECOUT SELECT SV-EXP16Z3INHZONE3 SELECT IC305 SV-EXP17Z1SMONIAMONITOR OUT SELECT SV-EXP18Z1SMONIBMONITOR OUT SELECT SV-EXP19Z1VMONIAMONITOR OUT SELECT SV-EXP20Z1VMONIBMONITOR OUT SELECT SV-EXP21Z2SMONIAZONE2 MONITOR OUT SELECT SV-EXP22Z2SMONIBZONE2 MO

24、NITOR OUT SELECT SV-EXP23Z2VMONIAZONE2 MONITOR OUT SELECT SV-EXP24Z2VMONIBZONE2 MONITOR OUT SELECT IC307 SV-EXP25Z1S1MAIN S1 SV-EXP26Z1S2MAIN S2 SV-EXP27Z1 S OSDMAIN S OSD/OSD PASS select control pin SV-EXP28Z1 V OSDMAIN S OSD/OSD PASS select control pin SV-EXP29NCNot used SV-EXP30NCNot used SV-EXP3

25、1NCNot used SV-EXP32NCNot used STROBE 1 2 3 4 5 6 7 89 10 11 16 15 14 13 12 DATA CLOCK Q1 Q2 Q3 Q4 VSS VDD OE Q5 Q6 Q7 Q8 QS QS 36 AVR-4806 / AVC-A11XV MBM29LV160BE90TN (IC506,605,704,804) DIGITAL P.W.B. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38

26、37 36 35 34 33 32 31 30 29 28 27 26 25 A15 A14 A13 A12 A11 A10 A9 A8 A19 N.C. WE RESET N.C. N.C. RY/BY A18 A17 A7 A6 A5 A4 A3 A2 A1 A16 BYTE VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE VSS CE A0 Standard Pinout (Marking Side) A-1 VSS VCC WE CE A0 to A19 OE St

27、ate Control Command Register Erase Voltage Generator Input/Output Buffer Y-Decoder X-Decoder Y-Gating Cell Matrix DQ0 to DQ15 Low VCC Detector Program Voltage Generator Timer for Program/Erase Chip Enable Output Enable Logic Data Latch BYTE RESET RY/BY Buffer RY/BY STB STB Address Latch 37 AVR-4806

28、/ AVC-A11XV BR24L02F-WE2 (IC101,102,201,202) D,VIDEO P.W.B. M95128-WMN6T (IC410) CONNECT P.W.B. Blockdiagram 1A0 A12 A23 GND4 VCC8 WP7 6SCL SDA5 2kbit EEPROM array Control logic High voltage generatorVcc level detect 8bit 8bit ACK STOPSTART Address decoder Slaveword address register 8bits Data regis

29、ter Pinconfiguration VCC A0 WP A1 SCL A2 SDA GND 1234 5678 Pinname Write protect input Power supply Function Ground (0V) Slave address set Serial clock input SDA VCC A0, A1, A2 Pin name GND WP SCL I / O IN IN IN IN / OUT Slave and word address, serial data input, serial data output 1 An open drain o

30、utput requires a pull-up resistor. 1 DVSS C HOLDQ SVCC W AI01790D 1 2 3 4 8 7 6 5 38 AVR-4806 / AVC-A11XV SiI9030CUT-7 (IC303) D.VIDEO P.W.B. Functional Block Diagram 39 AVR-4806 / AVC-A11XV SiI9031CUT-7 (IC103,203) D.VIDEO P.W.B. Functional Block Diagram 40 AVR-4806 / AVC-A11XV PCM1804 (IC913) AUDI

31、O P.W.B. 2 1 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VREFL AGNDL VCOML VINL+ VINL FMT0 FMT1 S/M OSR0 OSR1 OSR2 BYPAS DGND VDD VREFR AGNDR VCOMR VINR+ VINR AGND VCC OVFL OVFR RST SCKI LRCK/DSDBCK BCK/DSDL DATA/DSDR TOP VIEW SCKI VINL+ VCOML AGNDL VREFL VREFR AGNDR VCOMR

32、 VINR+ VINR OSR0 OSR1 OSR2 S/M FMT0 FMT1 LRCK/ DSDBCK BCK/DSDL DATA/DSDR OVFL OVFR BYPAS RST CLK Control VINL DGND VDDAGNDVCC Delta-sigma Modulator (L) VREFL VREFR Delta-sigma Modulator (R) Power Supply Decimation Filter (L) Decimation Filter (R) HPF HPF Serial Output Interface Pin NameFunction PCM1

33、804 Terminal Function Pin No. 1VREFLL-channel voltage reference output, requires capacitors for decoupling to AGND. 2AGNDLAnalog ground for VREFL. 3VCOMLL-channel analog common mode output. 4VINL+IL-channel analog input, positive pin. 5VINLIL-channel analog input, negative pin. 6FMT0IAudio data form

34、at 0. See TABLE V. * 7FMT1IAudio data format 1. See TABLE V. * 8S/MIMaster/slave mode selection. See TABLE IV. * 9OSR0IOversampling ratio 0. See TABLE I. TABLE II. * 10OSR1IOversampling ratio 1. See TABLE I. TABLE II. * 11OSR2IOversampling ratio 2. See TABLE I. TABLE II. * 12BYPASIHPF bypass control

35、. HIGH: HPF disable, LOW: HPF enable. * 13DGNDDigital ground. 14VDDDigital power supply. 15DATA/DSDROL-channel and R-channel audio data output in PCM mode. R-channel Audio data output in DSD mode.(DSD output, when DSD mode) 16BCK/DSDLI/OBit clock input/output in PCM mode. L-channel audio data output

36、 in DSD mode. * 17LRCK/DSDBCKI/OSampling clock input/output in PCM and DSD mode. * 18SCKIISystem clock input; 128fs, 256fs, 384fs, 512fs or 768fs. * 19RSTIReset, power down input, active LOW. * 20OVFROOverflow signal of R-channel in PCM mode. This is available in PCM mode only. 21OVFLOOverflow signa

37、l of L-channel in PCM mode. This is available in PCM mode only. 22VCCAnalog power supply. 23AGNDAnalog ground. 24VINRIR-channel analog input, negative pin. 25VINR+IR-channel analog input, positive pin. 26VCOMRR-channel analog common mode output. 27AGNDRAnalog ground for VREFR. 28VREFRR-channel volta

38、ge reference output, requires capacitors for decoupling to AGND. I/O * Schmitt trigger input with internal pull-down (51kohm typically), 5V tolerant. * Schmitt trigger input, 5V tolerant. * Schmitt trigger input. 41 AVR-4806 / AVC-A11XV LC89057W-VF4-E (IC101-103) DIGITAL P.W.B. LC89057W-VF4-E Termin

39、al Function 39 38 37 DI RERR SLRCK SDIN LC89057W-VF4-E DO 36 42 41 40 45 44 43 48 47 46 CL CE DGND XMODE TMCK/PIO0 DVDD TLRCK/PIO2 TBCK/PIO1 TXO/PIOE TDATA/PIO3 INT 35 CKST 34 AUDIO/VO 333231 DVDD 30 XIN 29 EMPHA/UO DGND 2827 DVDD 26 DGND 25 XOUT XMCK 23 24 21 RDATA SBCK DVDD RLRCK RBCK DGND AGND RM

40、CK LPF AVDD 4365871091211 21 22 19 20 17 18 15 16 13 14 *: Pull-down resistor internal RXOUT * RX0 RX1 * RX2 * RX3 DGND DVDD * RX4 * RX5/VI * RX6/UI DVDD DGND Pin No. PinI/OFunction 1RXOUTOInput bi-phase selection data output pin 2RX0I5TTL-compatible digital data input pin 3RX1ICoaxial-compatible di

41、gital data input pin with built-in amplifier 4RX2I5TTL-compatible digital data input pin 5RX3I5TTL-compatible digital data input pin 6DGNDDigital GND 7DVDDDigital power supply 8RX4I5TTL-compatible digital data input pin 9RX5/VII5TTL-compatible digital data | Validity flag input pin for modulation 10

42、RX6/UII5TTL-compatible digital data | User data input pin for modulation 11DVDDPLL digital power supply 12DGNDPLL digital GND 13LPFOPLL loop filter connection pin 14ACDDPLL analog power supply 15AGNDPLL analog GND 16RMCKOR system clock output pin (256fs, 512fs, XIN, VCO) 17RBCKO/IR bit clock input/o

43、utput pin (64fs) 18DGNDDigital GND 19DVDDDigital power supply 20RLRCKO/IR LR clock input/output pin (fs) 21RDATAOSerial audio data input pin 22SBCKOS bit clock output pin (32fs, 64fs, 128fs) 23SLRCKOS LR clock output pin (fs/2, fs, 2fs) 24SDINI5Serial audio data input pin 25DGNDDigital GND 26DVDDDig

44、ital power supply 27XMCKOOscillation amplifier output pin 28XOUTOCrystal resonator connection output pin 29XINICrystal resonator connection, external supply clock input pin (24.576 MHz or 12.288 MHz) 30DVDDDigital power supply 31DGNDDigital GND 32EMPHA/UOI/OEmphasis information | U data output | Chi

45、p address setting pin 33 AUDIO/VO I/ONon-PCM output | V flag output | Chip address setting pin 34 CKST I/OClock switch transition period signal | Demodulation master or slave function switch pin 35 INT I/OMicrocontroller interrupt output | Modulation or general-purpose I/O switch pin 36RERROPLL cloc

46、k error, data error flag output 37DOOMicrocontroller I/F read data output pin (3-state) 38DII5Microcontroller I/F write data input pin 39CEI5Microcontroller I/F chip enable input pin 40CLI5Microcontroller I/F clock input pin 41XMODEI5System reset input pin 42DGNDDigital GND 43DVDDDigital power suppl

47、y 44TMCK/PIO0I/OModulation 256fs system clock input | General-purpose I/O input/output pin 45TMCK/PIO1I/OModulation 64fs bit clock input | General-purpose I/O input/output pin 46TLRCK/PIO2I/OModulation fs clock input | General-purpose I/O input/output pin 47TLRCK/PIO3I/OModulation serial audio data

48、input | General-purpose I/O input/output pin 48TXO/PIOENO/IModulation data output | General-purpose I/O enable input pin 42 AVR-4806 / AVC-A11XV LC89057W-VF4-E BLOCK DIAGRAM LC75721E (IC103,104) FRONT P.W.B. LC75721E Terminal Function XMCKXINXOUT XMODECICECLINTAUDIO/VOEMPHA/UO RXOUT CKST 1 1/N PLL R

49、X0 RX1 RX2 RX3 RX4 RX5/VI TBCK/PIO1 TMCK/PIO0 RMCK RBCK SDIN RDATA RERR DO LPF RX6/UI10 33 9 8 5 4 3 2 323548393841 21 37 36 13 44 45 46 47 48 22 23 20 17 16 24 29282734 TXO/PIOEN TDATA/PIO3 TLRCK/PIO2 RLRCK SBCK SLRCK Input Selector Demodulation & Lock detect Microcontroller I/F Data Selector Cbit, Ubit Clock Selector Modulation & Parallel Port 64 49