HarmanKardon-AVR255_230-avr-sm维修电路原理图.pdf

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1、 harman/kardon Service Manual AVR 255/230 7 x 50W 7.1 CHANNEL A/V RECEIVER CONTENTS ESD WARNING 2 BASIC SPECIFICATIONS 3 TROUBLESHOOTING GUIDE 4 PROCESSOR RESET 4 REMOTE RESET 5 PACKAGE LIST AND PARTS 6 DISASSEMBLY 7 EXPLODED VIEW AND PARTS 8 ELECTRICAL PARTS LIST 9 SEMICONDUCTOR PINOUTS 50 PCB DRAW

2、INGS 121 BLOCK DIAGRAM 129 WIRING DIAGRAM 130 AMP BIAS ADJUSTMENT 131 SCHEMATIC DIAGRAMS 132 Released EU2008 harman/kardon, Inc. Rev 0, 07/2008 250 Crossways Park Dr. Woodbury, New York, 11797 harman/kardonAVR 255/230 Service ManualPage 1 of 144RadioFans.CN 收音机爱 好者资料库Eachprecautioninthismanualshould

3、befollowedduringservicing.Components identified with the IEC symbolin the parts list are special significance to safety. When replacing a component identified with, use only the replacement parts designated, or parts with the same ratings or resistance, wattage, or voltage that are designated in the

4、parts list in this manual. Leakage-current or resistance measurements must be made to determine that exposed parts are acceptablyinsulated from the supply circuit before retuming the product to the customer.Some semiconductor (solid state) devices can be damaged easily by static electricity. Such co

5、mponents commonly are calledElectrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field effect transistors andsemiconductor chip components.The following techniques should be used to help reduce the incidence of component damage caused by static el

6、ectricity.1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge onyour body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device,which should be removed for

7、 potential shock reasons prior to applying power to the unit under test.2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, toprevent electrostatic charge build-up or exposure of the assembly.3. Use only a grounded-tip

8、soldering iron to solder or unsolder ES devices.4. Use only an anti-static solder removal device. Some solder removal devices not classified as anti-static can generate electrical chargessufficient to damage ES devices.5. Do not use freon-propelled chemicals. These can generate electrical change suf

9、ficient to damage ES devices.6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacementES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive materia

10、l.)7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to thechassis or circuit assembly into which the device will be installed.Be sure no power is applied to the chassis or circuit, and observe all other safety precautions

11、.8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing togetheror your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES devices.CAUTION :harman/kardonAVR 2

12、55/230 Service ManualPage 2 of 144RadioFans.CN 收音机爱 好者资料库2TECHNICAL SPECIFICATIONS 57ENGLISHTechnical SpecificationsAudio SectionStereo Mode Continuous Average Power (FTC)65Watts per channel, 20Hz20kHz, 0.07% THD, both channels driven into 8 ohms7 Channel Surround Modes Power Per Individual Channel,

13、 all channels driven simultaneously:Front L&R channels:50Watts per channel, 0.07% THD, 20Hz20kHz into 8 ohmsCenter channel:50Watts, 0.07% THD, 20Hz20kHz into 8 ohmsSurround (L & R Side, Back) channels:50Watts per channel, 2000V (MIL STD 883 method 3015); MM 200VDESCRIPTIONThe 74LCX32 is a low voltag

14、e CMOS QUAD2-INPUT OR GATE fabricated with sub-micronsilicon gate and double-layer metal wiring C2MOStechnology. It is ideal for low power and highspeed 3.3V applications; it can be interfaced to 5Vsignal environment for inputs.It has same speed performance at 3.3V than 5VAC/ACT family, combined wit

15、h a lower powerconsumption.All inputs and outputs are equipped withprotection circuits against static discharge, givingthem 2KV ESD immunity and transient excessvoltage.74LCX32LOW VOLTAGE CMOS QUAD 2-INPUT OR GATEWITH 5V TOLERANT INPUTS Figure 1: Pin Connection And IEC Logic SymbolsTable 1: Order Co

16、des PACKAGET & RSOP74LCX32MTRTSSOP74LCX32TTRTSSOPSOPRev. 6harman/kardonAVR 255/230 Service ManualPage 55 of 14474LCX322/11Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description Table 3: Truth Table Table 4: Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond whi

17、ch damage to the device may occur. Functional operation under these conditions is not implied1) IO absolute maximum rating must be observed2) VO GND PIN NSYMBOLNAME AND FUNCTION1, 4, 9, 121A to 4AData Inputs2, 5, 10, 131B to 4BData Inputs3, 6, 8, 111Y to 4YData Outputs7GNDGround (0V)14VCCPositive Su

18、pply VoltageABYLLLLHHHLHHHHSymbolParameterValueUnitVCCSupply Voltage-0.5 to +7.0VVIDC Input Voltage-0.5 to +7.0VVODC Output Voltage (VCC = 0V)-0.5 to +7.0VVODC Output Voltage (High or Low State) (note 1)-0.5 to VCC + 0.5VIIKDC Input Diode Current- 50mAIOKDC Output Diode Current (note 2)- 50mAIODC Ou

19、tput Current 50mAICCDC Supply Current per Supply Pin 100mAIGNDDC Ground Current per Supply Pin 100mATstgStorage Temperature-65 to +150CTLLead Temperature (10 sec)300Charman/kardonAVR 255/230 Service ManualPage 56 of 1443Revision 1.9256M Double Data Rate Synchronous DRAMA3S56D30ETPA3S56D40ETPPin Assi

20、gnment (Top View) 66-pin TSOP123456789101112131415161718192021222324252627282930313233666564636261605958575655545352515049484746454443424140393837363534VDDDQ0VDDQDQ1DQ2VSSQDQ3DQ4VDDQDQ5DQ6VSSQDQ7NCVDDQLDQSNCVDDNCLDM/WE/CAS/RAS/CSNCBA0BA1A10/APA0A1A2A3VDDVSSDQ15VSSQDQ14DQ13VDDQDQ12DQ11VSSQDQ10DQ9VDDQ

21、DQ8NCVSSQUDQSNCVREFVSSUDM/CLKCLKCKENCA12A11A9A8A7A6A5A4VSS66pin TSOP(II)400mil widthx875mil length0.65mmLead PitchRowA0-12ColumnA0-9 (x8)A0-8 (x16)VDDDQ0VDDQNCDQ1VSSQNCDQ2VDDQNCDQ3VSSQNCNCVDDQNCNCVDDNCNC/WE/CAS/RAS/CSNCBA0BA1A10/APA0A1A2A3VDDVSSDQ7VSSQNCDQ6VDDQNCDQ5VSSQNCDQ4VDDQNCNCVSSQDQSNCVREFVSSD

22、M/CLKCLKCKENCA12A11A9A8A7A6A5A4VSSx8x16CLK, /CLKCKE/CS/RAS/CAS/WEDQ0-15UDM, LDM DM DQ0-7UDQS, LDQS DQS : Master Clock: Clock Enable: Chip Select: Row Address Strobe: Column Address Strobe: Write Enable: Data I/O (x16) : Write Mask (x16): Write Mask (x8): Data I/O (x8) : Data Strobe (x16): Data Strob

23、e (x8)A0-12BA0,1VddVddQVssVssQ: Address Input: Bank Address Input: Power Supply: Power Supply for Output: Ground: Ground for Outputharman/kardonAVR 255/230 Service ManualPage 57 of 1444Revision 1.9256M Double Data Rate Synchronous DRAMA3S56D30ETPA3S56D40ETPPIN FUNCTIONCLK, /CLKInputClock: CLK and /C

24、LK are differential clock inputs. All address and controlinput signals are sampled on the crossing of the positive edge of CLK andnegative edge of /CLK. Output (read) data is referenced to the crossings ofCLK and /CLK (both directions of crossing).CKEInputClock Enable: CKE controls internal clock. W

25、hen CKE is low, internal clockfor the following cycle is ceased. CKE is also used to select auto / self refresh.After self refresh mode is started, CKE becomes asynchronous input. Self refreshis maintained as long as CKE is low./CSInputChip Select: When /CS is high, any command means No Operation./R

26、AS, /CAS, /WEInputCombination of /RAS, /CAS, /WE defines basic commands.A0-12InputA0-12 specify the Row / Column Address in conjunction with BA0,1. The Row Address is specified by A0-12. The Column Address is specified by A0-9(x8) and A0-8(x16). A10 is also used to indicate precharge option. When A1

27、0 is high at a read / write command, an auto precharge is performed. When A10 is high at a precharge command, all banks are precharged. BA0,1InputDQ0-7 (x8),DQ0-15 (x16),Input / OutputDQS (x8)Vdd, VssPower SupplyPower Supply for the memory array and peripheral circuitry.VddQ, VssQPower SupplyVddQ an

28、d VssQ are supplied to the Output Buffers only.Bank Address: BA0,1 specifies one of four banks to which a command is applied. BA0,1 must be set with ACT, PRE, READ, WRITE commands. Data Input/Output: Data busData Strobe: Output with read data, input with write data. Edge-aligned with read data, cent

29、ered in write data. Used to capture write data. For the x16, LDQS corresponds to the data on DQ0-DQ7; UDQS correspond to the data on DQ8-DQ15SYMBOLTYPEDESCRIPTIONDM (x8)InputInput Data Mask: DM is an input mask signal for write data. Input data is masked when DM is sampled HIGH along with that input

30、 data during a WRITE access. DM is sampled on both edges of DQS. Although DM pins are input only, the DM loading matches the DQand DQS loading. For the x16, LDM corresponds to the data on DQ0-DQ7; UDM corresponds to the data on DQ8-DQ15.Input / OutputVrefInputSSTL_2 reference voltage.UDQS, LDQS (x16

31、)UDM, LDM (x16)harman/kardonAVR 255/230 Service ManualPage 58 of 144DS586PP517CS425282. PIN DESCRIPTIONS Pin Name#Pin DescriptionCX_SDIN1CX_SDIN2CX_SDIN3CX_SDIN41646362Codec Serial Audio Data Input (Input) - Input for twos complement serial audio data. CX_SCLK2CODEC Serial Clock (Input/Output) - Ser

32、ial clock for the CODEC serial audio interface.CX_LRCK3CODEC Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the CODEC serial audio data line.VD451Digital Power (Input) - Positive power supply for the digital section.DGND552Digital Ground (Input) - G

33、round reference. Should be connected to digital ground.VLC6Control Port Power (Input) - Determines the required signal level for the control port.SCL/CCLK7Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an external pull-up resistor to the logic interface voltag

34、e in I2C mode as shown in the Typical Connection Diagram.SDA/CDOUT8Serial Control Data (Input/Output) - SDA is a data I/O line in I2C mode and requires an external pull-up resistor to the logic interface voltage, as shown in the Typical Connection Diagram. CDOUT is the output data line for the contr

35、ol port interface in SPI mode.AD1/CDIN9Address Bit 1 (I2C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I2C mode; CDIN is the input data line for the control port interface in SPI mode.123456789101112131415161718 1920 21222324252627282930313264636261 60595857565554535251504948474

36、645444342414039383736353433CX_SDIN1SAI_SCLKSAI_LRCKVDDGNDVLCSCL/CCLKSDA/CDOUTAD1/CDINAD0/CSINTRSTAINR-AINR+AINL+AINL-VQFILT+REFGNDAOUTB4-AOUTB4+AOUTA4+AOUTA4-VAAGNDAOUTB3-AOUTB3+AOUTA3+AOUTA3-AOUTB2-AOUTB2+AOUTA2+AOUTA2-AOUTB1-AOUTB1+AOUTA1+AOUTA1-MUTECAGNDVARXRXP7/GPO7RXP6/GPO6RXP5/GPO5RXP4/GPO4RXP

37、3/GPO3RXP2/GPO2RXP1/GPO1LPFLTRXP0TXPVDDGNDVLSSAI_SDOUTRMCKCX_SDOUTADCIN2ADCIN1OMCKCX_LRCKCX_SCLKCX_SDIN4CX_SDIN3CX_SDIN2CS42528harman/kardonAVR 255/230 Service ManualPage 59 of 144CS4252818DS586PP5AD0/CS10Address Bit 0 (I2C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I2C m

38、ode; CS is the chip select signal in SPI mode.INT11Interrupt (Output) - The CS42528 will generate an interrupt condition as per the Interrupt Mask register. See “Interrupts” on page 40 for more details.RST12Reset (Input) - The device enters a low power mode and all internal registers are reset to th

39、eir default settings when low.AINR-AINR+1314Differential Right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma modulators via the AINR+/- pins.AINL+AINL-1516Differential Left Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma

40、 modulators via the AINL+/- pins.VQ17Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.FILT+18Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.REFGND19Reference Ground (Input) - Ground reference for the internal

41、 sampling circuits.AOUTA1 +,-AOUTB1 +,-AOUTA2 +,-AOUTB2 +,-AOUTA3 +,-AOUTB3 +,-AOUTA4 +,-AOUTB4 +,-36,3735,3432,3331,3028,2927,2622,2321,20Differential Analog Output (Output) - The full-scale differential analog output level is specified in the Analog Characteristics specification table.VA VARX2441A

42、nalog Power (Input) - Positive power supply for the analog section. AGND2540Analog Ground (Input) - Ground reference. Should be connected to analog ground.MUTEC38Mute Control (Output) - The Mute Control pin outputs high impedance following an initial power-on con-dition or whenever the PDN bit is se

43、t to a 1, forcing the codec into power-down mode. The signal will remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes to the selected “active” state during reset, muting, or if the master clock to left/right clock frequency ratio is incorrect. This p

44、in is intended to be used as a control for external mute circuits to prevent the clicks and pops that can occur in any single supply system. The use of external mute circuits are not manda-tory but may be desired for designs requiring the absolute minimum in extraneous clicks and pops.LPFLT39PLL Loo

45、p Filter (Output) - An RC network should be connected between this pin and ground.RXP7/GPO7RXP6/GPO6RXP5/GPO5RXP4/GPO4RXP3/GPO3RXP2/GPO2RXP1/GPO142434445464748S/PDIF Receiver Input/ General Purpose Output (Input/Output) - Receiver inputs for S/PDIF encoded data. The CS42528 has an internal 8:2 multi

46、plexer to select the active receiver port, according to the Receiver Mode Control 2 register. These pins can also be configured as general purpose output pins, ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control registers.RXP049S/PDIF Receiver Input (Inpu

47、t) - Dedicated receiver input for S/PDIF encoded data.TXP50S/PDIF Transmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the receiver inputs as indicated by the Receiver Mode Control 2 register.VLS53Serial Port Interface Power (Input) - Determines the required signal l

48、evel for the serial port interfaces.SAI_SDOUT54Serial Audio Interface Serial Data Output (Output) - Output for twos complement serial audio PCM data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the inter-nal and external ADCs.RMCK55Recovered Master Clock

49、 (Output) - Recovered master clock output from the External Clock Reference (OMCK, pin 59) or the PLL which is locked to the incoming S/PDIF stream or CX_LRCK. harman/kardonAVR 255/230 Service ManualPage 60 of 144DS586PP519CS42528CX_SDOUT56CODEC Serial Data Output (Output) - Output for twos compleme

50、nt serial audio data from the internal and external ADCs.ADCIN1ADCIN25857External ADC Serial Input (Input) - The CS42528 provides for up to two external stereo analog to digital converter inputs to provide a maximum of six channels on one serial data output line when the CS42528 is placed in One Lin