Pioneer-CX3158-cdm-sm 维修电路原理图.pdf

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1、PIONEER CORPORATION4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153-8654, Japan PIONEER ELECTRONICS (USA) INC.P.O.Box 1760, Long Beach, CA 90801-1760 U.S.A.PIONEER EUROPE NVHaven 1087 Keetberglaan 1, 9120 Melsele, Belgium PIONEER ELECTRONICS ASIACENTRE PTE.LTD.253 Alexandra Road, #04-01, Singapore 159936C

2、PIONEER CORPORATION 2004K-ZZA. DEC. 2004 Printed in JapanORDER NO.CRT3394CD MECHANISM MODULE(S10.1AAC)CX-3158ServiceManualModelService ManualCD Mechanism ModuleDEH-P770MP/XN/UCCRT3333CXK5617DEH-P7700MP/XN/EWCRT3334CXK5663DEH-P670MP/XN/UCCRT3335CXK5663DEH-3730MP/XN/EWCRT3395CXK5663DEH-3700MP/XN/EWDEH

3、-2750MP/XN/GSCRT3396CXK5663DEH-2790MP/XN/IDDEH-2770MP/XN/CSDEH-3700MP/XU/UCCRT3397CXK5668DEH-4700MP/XU/EWCRT3398CXK5668DEH-4700MPB/XU/EWDEH-3750MP/XU/GSCRT3399CXK5668DEH-3770MP/XU/CSCXK5669DEH-3750MP/XU/CNDEH-P470MP/XM/UCCRT3400CXK5668DEH-P4700MP/XM/UCDEH-P4750MP/XM/GSCRT3401CXK5668DEH-P4790MP/XM/ID

4、DEH-P4770MP/XM/CSDEH-P3700MP/XU/UCCRT3402CXK5668- This service manual describes the operation of the CD mechanism module incorporated in models list-ed in the table below.- When performing repairs use this manual together with the specific manual for model under repair.CONTENTS1. CIRCUIT DESCRIPTION

5、S.22. MECHANISM DESCRIPTIONS.193. DISASSEMBLY .21RadioFans.CN 收音机爱 好者资料库212341234FEDCBACX-31581. CIRCUIT DESCRIPTIONSRecently, most CD LSIs have included DAC, RF amplifier and other peripheral circuits, as well as the core circuit DSP.This series of mechanisms employ a multi-task LSI UPD63763GJ, whi

6、ch has CD-ROM decoder and MP3/WMA decoderin addition to the CD block as shown in the Fig.1.0.1. This enables to reproduce a CD-ROM where MP3/WMA data isrecorded.Fig.1.0.1 Block diagram of CD LSI UPD63763GJA-FUPD63763GJAudio outputDigital servoRF amplifierCD-ROMdecoderEFMSignalprocessorMicrocomputerS

7、RAM(1Mbit)Buffer memorycontroller(BMC)DACMP3/WMAdecoderRadioFans.CN 收音机爱 好者资料库35678FEDCBA5678CX-31581.1 PREAMPLIFIER BLOCK (UPD63763GJ: IC201)In the preamplifier block, the pickup output signals are processed to generate signals that are used for the next-stageblocks: the servo block, demodulator, a

8、nd control.After I/V-converted by the preamplifier with built-in photo detectors (inside the pickup), the signals are applied to thepreamplifier block in the CD LSI UPD63763GJ (IC201). After added by the RF amplifier in this block, these signals areused to produce necessary signals such as RF, FE, T

9、E, and TE zero-cross signals.The CD LSI employs a single power supply system of + 3.3V. Therefore, the REFO (1.65V) is used as the reference volt-age both for this CD LSI and the pickup. The LSI produces the REFO signal by using the REFOUT via the buffer amplifi-er and outputs from the pin 133. All

10、the measurements should be made based on this REFO.Caution: Be careful not to short the REFO and GRD when measuring. 1.1.1 APC (Automatic Power Control)A laser diode has extremely negative temperature characteristics in optical output at constant-current drive. To keepthe output constant, the LD cur

11、rent is controlled by monitor diodes. This is called the APC circuit. The LD current iscalculated at about 30mA, which is the voltage between LD1 and V3R3D divided by 7.5 (ohms).Fig. 1.1.1 APCPICKUP UNITCD CORE UNITMDVRLD-LD+571514571514R1100/162SB11322R4 x 22R7+-+-+-PDVREFREG 1.25VAPNLDSUPD63763GJL

12、D1431426R5K1K6R5K1K110K100K100K3P412341234FEDCBACX-31581.1.2 RF and RFAGC amplifiersThe photo-detector outputs (A + C) and (B + D) are added, amplified, and equalized inside this LSI, and then providedas the RF signal from the RFI terminal. The RF signal can be used for eye-pattern check.The low fre

13、quency component of the RFO voltage is:RFO = (A + B + C + D) x 2The RFO is used for the FOK generation circuit and RF offset adjustment circuit.The RFI output from the pin 119 is A/C-coupled outside this LSI, and returned to the pin 118 of this LSI. The signal isamplified in the RFAGC amplifier to o

14、btain the RFAGC signal. This LSI is equipped with the RFAGC auto-adjustmentfunction as explained below. This function automatically controls the RFO level to keep at 1.5V by switching the feed-back gain for the RFAGC amplifier.The RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjus

15、tment circuits.Fig. 1.1.2 RF/AGC/FEPICKUP UNITP3A+C136136VREFVREF12510K15R2K15R2KR2VREF For RFOK generationTo DEFECT/A3T detectionFE A/DRFOFF setup61K61K8R8K35K111K8R8K10K10K10K127128126ABDCB+DP8P4P2P9P7CD CORE UNITUPD63763GJ+-+-+-+-RFOFF setup+-136FEO135FE-+-+-20K11R2K119RFO118AGCI7R05K10K10K1R2K5P

16、5R6K4R7K1R2K33P56P123RF-122RF2-116AGCO121EQ1120EQ255678FEDCBA5678CX-31581.1.3 Focus error amplifierThe photo-detector outputs (A + C) and (B + D) are applied to the differential amplifier and the error amplifier to obtainthe (A + C - B - D) signal, which is then provided from the pin 91 as the FE si

17、gnal. The low frequency component of the FE voltage is:FE = (A + C - B - D) x 8.8/10k x 111k/61k x 160k/72k= (A + C - B - D) x 3.5The FE output shows 1.5Vp-p S-shaped curve based on the REFO. For the next-stage amplifiers, the cutoff frequencyis 14.6kHz.1.1.4 RFOKThe RFOK circuit generates the RFOK

18、signal, which indicates focus-close timing and focus-close status during the playmode, and outputs from the pin 55. This signal is shifted to H when the focus is closed and during the play mode.The DC level of the RFI signal is peak-held in the digital block and compared with a certain threshold lev

19、el to generatethe RFOK signal. Therefore, even on a non-pit area or a mirror-surface area of a disc, the RFOK becomes H and thefocus is closed.This RFOK signal is also applied to the microcomputer via the low-pass filer as the FOK signal, which is used for pro-tection and RF amplifier gain switching

20、.1.1.5 Tracking error amplifierThe photo-detector outputs E and F are applied to the differential amplifier and the error amplifier to obtain the (E - F)signal, and then provided from the pin 136 as the TE signal. The low frequency component of the TE voltage is:TEO = (E - F) x 63k/112k x 160k/160k

21、x 181k/45.4k x 160k/80k= (E - F) x 4.48The TE output provides the TE waveform of about 1.3Vp-p based on the REFO. For the next-stage amplifiers, the cut-off frequency is 21.1kHz.Fig. 1.1.3 TEP5VERFE11FEF9119P6P1P10130112K160K129112K160K160K63K80K161K45R36K45R36K+-63K+-+-VREFTEOFF setupTE A/D+-+-+-+-

22、60K20KInside TEC139TEO138TE-140TE2141TEC47P6800PCD CORE UNITPICKUP UNITUPD63763GJ612341234FEDCBACX-31581.1.6 Tracking zero-cross amplifierThe tracking zero-cross signal (hereinafter TEC signal) is obtained by amplifying the TE signal 4 times, and used todetect the tracking-error zero-cross point.By

23、using the information on this point, the following two operations can be performed:1. Track counting in the carriage move and track jump modes2. Sensing the lens-moving direction at the moment of the tracking close (The sensing result is used for the trackingbrake circuit as explained below.)The fre

24、quency range of the TEC signal is between 300Hz and 20kHz.TEC voltage = TE level x 4The TEC level can be calculated at 4.62V. This level exceeds the D range of the operational amplifier, and the signalgets clipped. However, it can be ignored because the CD LSI only uses the signal at the zero-cross

25、point. 1.1.7 EFMThe EFM circuit converts the RF signal into a digital signal expressed in binary digits 0 and 1. The AGCO output fromthe pin 116 is A/C-coupled in the peripheral circuit, fed back to the LSI from the pin 114, and sent to the EFM circuitinside the LSI.On scratched or dirty discs, part

26、 of the RF signal recorded may be missing. On other discs, part of the RF signalrecorded may be asymmetric, which was caused by dispersion in production quality. Such lack of information cannotbe completely eliminated by this AC coupling process. Therefore, by utilizing the fifty-fifty occurrence ra

27、tio of binarydigits (0 and 1) in the EFM signal, the EFM comparator reference voltage ASY is controlled, so that the comparatorlevel always stays around the center of the RFO signal. The reference voltage ASY is made from the EFM comparatoroutput via the low-pass filter. The EFM signal is put out fr

28、om the pin 111.Fig. 1.1.4 EFM1142K7R5K1R5K40K40KVDDVDD+-+-+-RFIUPD63763GJEFM signal111EFM112ASY75678FEDCBA5678CX-31581.2 SERVO BLOCK (UPD63763GJ: IC201)The servo block controls the servo systems for error signal equalizing, in-focus, track jump and carriage move and soon. The DSP block is a signal-p

29、rocessing block, where data decoding, error correction, and compensation are per-formed. After A/D-converted, the FE and TE signals (generated in the preamplifier block) are applied to the servo block andused to generate the drive signals for the focus, tracking, and carriage servos.The EFM signal i

30、s decoded in the DSP block, and finally sent out as the audio signal after D/A-converted. In thisdecoding process, the spindle servo error signal is generated, supplied to the spindle servo block, and used to gener-ate the spindle drive signal.The drive signals for focus, tracking, carriage, and spi

31、ndle servos (FD, TD, SD, and MD) are provided as PWM3 data,and then converted to the analog data by the low-pass filter embedded in the driver IC BA5835FP (IC301). These ana-log drive signals can be monitored by the FIN, TIN, CIN, and SIN signals respectively. Afterwards, the signals areamplified an

32、d applied to each servos actuator and motor.1.2.1 Focus servo systemIn the focus servo system, the digital equalizer block works as its main equalizer. The figure 1.2.1 shows the block dia-gram of the focus servo system.To close the focus loop circuit, the lens should be moved to within the in-focus

33、 range. While moving the lens up anddown by using the focus search triangular signal, the system tries to find the in-focus point. In the meantime, the spin-dle motor rotation is kept at the prescribed one by using the kick mode.The servo LSI monitors the FE and RFOK signals and automatically perfor

34、ms the focus close operations at an appropri-ate timing. The focus loop will close when the following three conditions are satisfied at the same time:1) The lens moves toward the disc surface.2) The RFOK signal is shifted to H.3) The FE signal is zero-crossed. At last, the FE signal comes to the zer

35、o level (or REFO).When the focus loop is closed, the FSS bit is shifted from H to L. The microcomputer starts monitoring the RFOKsignal obtained through the low-pass filter 10msec after that.If the RFOK signal is detected as L, the microcomputer will take several actions including protection.The tim

36、ing chart for focus close operations is shown in fig. 1.2.2.(This shows the case where the system fails focus close.)In the test mode, the S-shaped curve, search voltage, and actual lens movement can be confirmed by pressing thefocus close button when the focus mode selector displays 01.Fig. 1.2.1 B

37、lock diagram of the focus servo system FEAMPA/DDIG.EQFOCUS SEARCHTRIANGULARWAVE GENERATORCONTROL125128A+CB+DPWMFDUPD63763GJ61112FOPFOMLENSBA5835FP101812341234FEDCBACX-3158Fig. 1.2.2 Timing chart for focus close operations 1.2.2 Tracking servo systemIn the tracking servo system, the digital equalizer

38、 block is used as its main equalizer. The figure 1.2.3 shows the blockdiagram of the tracking servo system.(a) Track jumpTrack jump operation is automatically performed by the auto-sequence function inside the LSI with a command fromthe microcomputer. In the search mode, the following track jump mod

39、es are available: 1, 4, and 100In the test mode, 1, 32, and 32*3 track jump modes, and carriage move mode are available and can be switched byselecting the mode.For track jumps, first, the microcomputer sets about half the number of tracks to be jumped as the target. (Ex. For 10track jumps, it shoul

40、d be 5 or so.) Using the TEC signal, the microcomputer counts up tracks. When the counterreaches the target set by the microcomputer, a brake pulse is sent out to stop the lens. The pulse width is determinedby the microcomputer. Then, the system closes the tracking loop and proceeds to the normal pl

41、ay. At this moment, tomake it easier to close the tracking loop, the brake circuit is kept ON for 50msec after the brake pulse, and the trackingservo gain is increased.In the normal operation mode, the FF/REW operation is realized by continuously repeating single jumps about 10times faster than the

42、normal single jump operation.(b) Brake circuitThe brake circuit stabilizes the servo-loop close operation even under poor conditions, especially in the setting-upmode or track jump mode. This circuit detects the lens-moving direction and emits only the drive signal for the oppo-site direction to slo

43、w down the lens. Thus, this makes it easier to close the tracking servo loop. The off-track directionis detected from the phases of the TEC and MIRR signals.FE controlling signalsFSS bit of SRVSTS1 resistorRFOK signalsOutput from FD terminalA blind periodSearch startYou can ignore this for blind per

44、iods.The broken line in the figure is assumed in the case without focus servo.The status of focus close is judged from the statuses of FSS and RFOK after about 10mS.95678FEDCBA5678CX-3158Fig. 1.2.3 Block diagram of the tracking servo systemFig. 1.2.4 Single-track jumpEFLENSTEAMPA/DDIG.EQJUMPPARAMETE

45、RSCONTROLPWMTDUPD63763GJ31413TOPTOMBA5835FP130129103t1t2GAIN NORMALTDKICKBRAKETECT. BRAKEEQUALIZERT. SERVOCLOSEDOPENNORMALGAIN UPOFFON1012341234FEDCBACX-3158Fig. 1.2.5 Multi-track jumpFig. 1.2.6 Track braket1TDTEC(10 TRACK)EQUALIZERT. BRAKESERVOSD2.9mS (4.10 TRACK JUMP)5.8mS (32 TRACK JUMP)GAIN UPNO

46、RMALONOFFOPENCLOSEDt250mStTECTZC(TEC SQUARED UP )(INTERNAL SIGNAL )MIRRMIRR LATCHED ATTZC EDGES=SWITCHING PULSEEQUALIZER OUTPUT(SWITCHED)DRIVE DIRECTIONNote : Equalizer output assumed to hava same phase as TEC.FORWARDLENS MOVING FORWARDS(INNER TRACK TO OUTER)LENS MOVING BACKWARDSTimeREVERSE115678FED

47、CBA5678CX-31581.2.3 Carriage servo systemIn the carriage servo system, the low frequency component from the tracking equalizer (the information on the lensposition) is transferred to the carriage equalizer, where the gain is increased to a certain level, and then sent out fromthe LSI as the carriage

48、 drive signal. This signal is applied to the carriage motor via the driver IC.During the play mode, when the lens offset reaches a certain level, it is necessary to move the pickup toward the FOR-WARD direction. The equalizer gain is adjusted so that the output over the carriage motor starting volta

49、ge is sent outin such a case. In actual operations, only when the equalizer output exceeds the threshold level preset in the servoLSI, the drive signal is sent out. This can reduce the consumption power. With an eccentric disc loaded, before the whole pickup starts moving, the equalizer output may e

50、xceed the thresholdlevel a few times. In this case, the drive signal applied from the LSI shows pulse-like waveforms.Fig. 1.2.7 Block diagram for the carriage servo blockFig. 1.2.8 Waveforms of the carriage signalDIG.EQKICK, BRAKEREGISTERSCONTROLPWMSDUPD63763GJFromTRACK EQ.241718LCOPLCOMBA5835FPMCAR