dr135_235_435SM.pdf

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1、DR-135 / DR-235 / DR-435 Service Manual CONTENTS SPECIFICATIONS GENERAL . 2 TRANSMITTER . 2 RECEIVER . 2 CIRCUIT DESCRIPTION DR-135 1) Receiver System (DR-135) . 3, 4 2) Transmitter System (DR-135) . 4, 5 3) PLL Synthesizer Circuit (DR-135) . 5, 6 4) Receiver System (DR-235) . 6, 7 5) Transmitter Sy

2、stem (DR-235) . 7, 8 6) PLL Synthesizer Circuit (DR-235) . 8, 9 7) Receiver System (DR-435) . 9, 10 8) Transmitter System (DR-435) . 10 9) PLL Synthesizer Circuit (DR-435) . 11 10) CPU and Peripheral Circuits(DR-135 DR-235 DR-435) . 11,12 11) Power Supply Circuit . 13 12) M3826M8269GP (XA0818). 1416

3、 SEMICONDUCTOR DATA 1) M5218FP (XA0068) . 17 2) NJM7808FA (XA0102) . 17 3) TC4S66F (XA0115) . 17 4) TK10930VTL (XA0223) . 18 5) BU4052BF (XA0236) . 19 6) TC4W53FU (XA0348) . 19 7) M64076GP (XA0352) . 20 8) LA4425A (XA0410). 21 9) M67746 (XA0412) . 21 10) M68729 (XA0591) . 22 11) M57788 (XA0077A) . 2

4、3 12) mPC2710T (XA0449) . 24 13) NJM2902 (XA0596) . 24 14) 24LC32A (XA0604) . 25 15) S-80845ALMP-EA9-T2 (XA0620) . 25 16) L88MS05TLL (XA0675) . 25 17) AN8010M (XA0119) . 26 18) TK10489M (XA0314) . 26 19) Transistor, Diode, and LED Ontline Drawings . 27 20) LCD Connection (TTR3626UPFDHN) . 28 EXPLODE

5、D VIEW 1) Top and Front View . 29 2) Bottom View. 30 3) LCD Assembly. 31 PARTS LIST CPU .32, 33 Main Unit(DR-135). 3336 Main Unit(DR-235). 3639 VCO Unit(DR-235) . 39 Main Unit(DR-435). 42 VCO Unit(DR-435) . 42 Mechanical Parts . 43 Packing Parts . 43 ACCESSORIES. 43 ACCESSORIES(SCREW SET) . 43 TNC(E

6、J41U) . 44 TNC (EJ41U) Packing Parts . 45 DR-135 ADJUSTMENT 1) Adjustment Spot . 46 2) VCO and RX Adjustment Specification . 47 3) Tx Adjustment Specification . 47 4) Rx Test Specification. 48 5) Tx Test Specification . 49 DR-235 ADJUSTMENT 1) Adjustment Spot . 50 2) VCO and RX Adjustment Specificat

7、ion . 51 3) Tx Adjustment Specification . 51 4) Rx Test Specification. 52 5) Tx Test Specification . 53 DR-435 ADJUSTMENT 1) Adjustment Spot . 54 2) VCO and RX Adjustment Specification . 55 3) Tx Adjustment Specification . 55 4) Rx Test Specification. 56 5) Tx Test Specification . 57 PC BOARD VIEW 1

8、) CPU Unit Side A . 58 2) CPU Unit Side B . 58 3) Main Unit Side A DR-135 (UP 0400B) . 59 4) Main Unit Side B DR-135 (UP 0400B) . 59 5) Main Unit Side A DR-235 (UP 0414) . 60 6) Main Unit Side B DR-235 (UP 0414) . 60 7) Main Unit Side A DR-435 (UP 0415) . 61 8) Main Unit Side B DR-435 (UP 0415) . 61

9、 9) Tnc Unit Side A (UP 0402) (DR-135TP only) . 62 10) Tnc Unit Side B (UP 0402) (DR-135TP only) . 62 SCHEMATIC DIAGRAM 1) CPU Unit DR-135 / DR-235 / DR-435 . 63 2) Main Unit DR-135 . 64 3) Main Unit DR-235 . 65 4) Main Unit DR-435 . 66 5) TNC Unit (DR-135TP only) . 67 BLOCK DIAGRAM 1) DR-135. 68 2)

10、 DR-235. 69 3) DR-435. 70 ALINCO,INC. 2 SPECIFICATIONS General Frequency coverageDR-135DR-235DR-435 118.000 135.995MHz (AM RX)216.000 279.995MHz (RX)350.000 511.995MHz (RX) 136.000 173.995MHz (RX)222.000 224.995MHz (TX)430.000 449.995MHz (TX) 144.000 147.995MHz (TX) 144.000 145.995MHz (RX.TX)430.000

11、 439.995MHz (RX.TX) TA,TAG118.000 135.995MHz (AM RX) (Commercial)136.000 173.995MHz (RX.TX) Operating mode Frequency resolution Number of memory channels Antenna impedance Power requirement Ground method Current drain Receive0.6A(Max.) 0.4A(Squelched) Transmit 11.0A max.8.0A max.10.0A max. Operating

12、 temperature Frequency stability Dimensions Weight Transmitter Output powerHigh:50W (144-148MHz)High:25WHigh:35W More than 33W (136-174MHz) Mid:10WMid:10WMid:10W Low:Approx.5WLow:Approx.5WLow:Approx.5W Modulation system Maximum frequency deviation Spurious emission Adjacent channel power Noise and h

13、um ratio Receiver Sensitivity Receiver circuitry Intermediate frequency Squelch sensitivity Adjacent channel selectivity Intermoduration rejection ratio Spurious and image rejection ratio Audio output power ! Note: All specifications are subject to change without notice or obligation. 2.0W (8 ,10%TH

14、D) 70dB 60dB -65dB(Wide mode) -55dB(Narrow mode) -18dBu Double conversion superheterodyne -16dBu for 12dB SINAD 2k -40dB (Wide mode) -34dB (Narrow mode) -60dB -60dB 5kHz (Wide mode) 2.5kHz (Narrow mode) Variable reactance frequency modulation 142(w)40(h)174(d) mm ( 14240188mm for projection included

15、) Approx. 1.0kg E,EG (European amateur) T,TG (U.S amateur) - 10 to 60 5ppm FM 16K0F3E (Wide mode) 8K50F3E (Narrow mode) 5,8.33,10,12.5,15,20,25,30,50 KHz 100 50 unbalanced 13.8V DC 15% (11.7 to 15.8V) Negative ground CC Microphone impedance 1st 21.7MHz 2nd 450kHz1st 30.85MHz 2nd 455kHz1st 30.85MHz 2

16、nd 455kHz 3 CIRCUIT DESCRIPTION DR-135/DR-235/DR-435 1) Receiver System (DR-135) The receiver system is a double superheterodyne system with a 21.7 MHz first IF and a 450 kHz second IF . 1. Front End The received signal at any frequency in the 136.000MHz to 173.995MHz range is passed through the low

17、-pass filter (L116, L115, L114, L113, C204, C203, C202, C216 and C215) and tuning circuit (L105, L104 and D105, D104), and amplified by the RF amplifier (Q107). The signal from Q107 is then passed through the tuning circuit (L103, L102, and varicaps D103 and D102) and converted into 21.7 MHz by the

18、mixer (Q106). The tuning circuit, which consists of L105, L104, varicaps D105 and D104, L103, L102, varicaps D103 and D102, is controlled by the tracking voltage form the VCO. The local signal from the VCO is passed through the buffer (IC112), and supplied to the source of the mixer (Q106). The radi

19、o uses the lower side of the superheterodyne system. 2. IF Circuit The mixer mixes the received signal with the local signal to obtain the sum of and difference between them. The crystal filter (XF102, XF101) selects 21.7 MHz frequency from the results and eliminates the signals of the unwanted freq

20、uencies. The first IF amplifier (Q105) then amplifies the signal of the selected frequency. 3. Demodulator Circuit After the signal is amplified by the first IF amplifier (Q105), it is input to pin 24 of the demodulator IC (IC108). The second local signal of 21.25 MHz (shared with PLL IC reference o

21、scillation), which is oscillated by the internal oscillation circuit in IC116 and crystal (X103), is input through pin 1 of IC108. Then, these two signals are mixed by the internal mixer in IC108 and the result is converted into the second IF signal with a frequency of 450 kHz. The second IF signal

22、is output from pin 3 of IC108 to the ceramic filter (FL101 or FL102), where the unwanted frequency band of that signal is eliminated, and the resulting signal is sent back to the IC108 through pins 5. The second IF signal input via pin 5 is demodulated by the internal limiter amplifier and quadratur

23、e detection circuit in IC108, and output as an audio signal through pin 12. 4. Audio Circuit The audio signal from pin 12 of IC108 is amplified by the audio amplifier (IC104:A),and switched by the signal switch IC (IC111) and then input it to the de-emphasis circuit. and is compensated to the audio

24、frequency characteristics in the de-emphasis circuit (R203, R207, R213, R209, C191, C218, C217) and amplified by the AF amplifier (IC104:D). The signal is then input to volume (VR1) . The adjusted signal is sent to the audio power amplifier (IC117) through pin 1 to drive the speaker. 4 5. Squelch Ci

25、rcuit The detected output which is outputted from the pin 12 of IC108 is inputted to pin 19 of IC108 after it was been amplified by IC104:A and it is outputted from pin 20 after the noise component was been eliminated from the composed band pass filter in the built in amplifier of the IC, then the s

26、ignal is rectified by D106 to convert into DC component. The adjusted voltage level at VR101 is delivered to the comparator of the CPU. The voltage is led to pin 2 of CPU and compared with the setting voltage. The squelch will open if the input voltage is lower than the setting voltage. During open

27、squelch, pin 30 (SQC) of the CPU becomes L level, AF control signal is being controlled and sounds is outputted from the speaker.) 6. AIR Band Reception(T only) When the frequency is within 118135.995MHz, Q110 automatically turns ON, pin 14 of IC108 becomes L level and the condition becomes in AM de

28、tection mode. The receiver signal passed through the duplexer is let to the antenna switch (D107,D101). After passing through the band-pass filter, the signal is amplified by RF amplifier Q112. Secondly the signal is mixed with the signal from the first local oscillator in the first-mixer Q106,then

29、converted into the first IF. Its unwanted signal is let to IC106, pin24. Then converted into the second IF. and is demodulated by AM decoder of IC106, and is output from pin13 as the AF signal. 7. WIDE/NARROW switching circuit The 2nd IF 450 kHz signal which passes through filter FL101 (wide) and FL

30、102 (narrow) during narrow, changes its width using the width control switching IC103 and IC102. 2) Transmitter System (DR-135) 1. Modulator Circuit The audio signal is converted to an electrical signal by the microphone, and input it to the microphone amplifier (Q6). Amplified signal which passes t

31、hrough mic-mute control IC109 is adjusted to an appropriate mic-volume by means of mic-gain adjust VR106. IC114:A and B consists of two operational amplifiers; one amplifier (pins 1, 2, and 3) is composed of pre-emphasis and IDC circuits and the other (pins 5, 6, and 7) is composed of a splatter fil

32、ter. The maximum frequency deviation is obtained by VR107. and input to the signal switch (IC113) (9600 bps packet signal input switch) and input to the cathode of the varicap of the VCO, to change the electric capacity in the oscillation circuit. This produces the frequency modulation. 5 2. Power Amplifier Circuit The transmitted signal is oscillate