IC-FR4000_serv.pdf

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1、UHF FM REPEATER iC-fr4000 INTRODUCTION This service manual describes the latest service informa- tion for the IC-FR4000 UHF FM REPEATER. To upgrade quality, all electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGER Use ONLY the specified AC v

2、oltage described on the AC power socket. Other voltages may causes repeater damage or personal injuy. DO NOT expose the repeater to rain, snow or any liquids. DO NOT apply an RF signal of more than 20 dBm (100 mW) to the antenna connector. This could damage the repeaters front end. ORDERING PARTS Be

3、 sure to include the following four points when ordering replacement parts: 1. 10-digit order numbers 2. Component part number and name 3. Equipment model name and unit name 4. Quantity required 1110003780 S.IC NJM2902V IC-FR4000 LOGIC UNIT 1 piece 8930056450 2368 6-key IC-FR4000 CHASSIS 5 pieces Ad

4、dresses are provided on the inside back cover for your convenience. REPAIR NOTES Make sure a problem is internal before disassembling the repeater. DO NOT open the repeater until the repeater is discon- nected from AC outlet. DO NOT force any of the variable components. Turn them slowly and smoothly

5、. DO NOT short any circuits or electronic parts. An insu- lated tuning tool MUST be used for all adjustments. DO NOT keep power ON for a long time when the re- peater is defective. DO NOT transmit power into a signal generator or a sweep generator. ALWAYS connect a 40 dB or 50 dB attenuator be- twee

6、n the repeater and a deviation meter or spectrum analyser when using such test equipment. READ the instructions of test equipment thoroughly before connecting equipment to the repeater. 1. 2. 3. 4. 5. 6. 7. 8. VERSION NO. #13 #23 VERSION 100 V120 V 220 V240 V TABLE OF CONTENTS SECTION 1 SPECIFICATIO

7、NS SECTION 2INSIDE VIEWS SECTION 3CIRCUIT DESCRIPTION 3 - 1 RECEIVER CIRCUITS . 3 - 1 3 - 2 TRANSMITTER CIRCUITS . 3 - 3 3 - 3 PLL CIRCUITS. 3 - 4 3 - 4 THE OTHER CIRCUITS. 3 - 5 3 - 5POWER SUPPLY CIRCUITS . 3 - 5 3 - 6 PORT ALLOCATIONS . 3 - 6 SECTION 4ADJUSTMENT PROCEDURES 4 - 1 PREPARATION. 4 - 1

8、 4 - 2 PLL ADJUSTMENST . 4 - 4 4 - 3 RECEIVER ADJUSTMENT . 4 - 6 4 - 4SOFTWARE ADJUSTMENT. 4 - 7 SECTION 5PARTS LIST SECTION 6 OPTION UNIT INSTALLATION SECTION 7MECHANICAL PARTS AND DISASSEMBLY SECTION 8SEMI-CONDUCTOR INFORMATION SECTION 9 BOARD LAYOUTS 9 - 1FRONT UNIT. 9 - 1 9 - 2VR UNIT. 9 - 1 9 -

9、 3TVCO UNIT. 9 - 1 9 - 4 RVCO UNIT. 9 - 1 9 - 5 LOGIC UNIT. 9 - 3 9 - 6RX UNIT. 9 - 5 9 - 7 TX UNIT . 9 - 7 9 - 8 50PA UNIT. 9 - 9 9 - 9 VARISTER UNIT . 9 - 9 9 - 10REG UNIT . 9 - 11 9 - 11JACK1 UNIT. 9 - 11 9 - 12JACK2 UNIT. 9 - 11 SECTION 10 BLOCK DIAGRAM SECTION 11 VOLTAGE DIAGRAM 1 - 1 SECTION 1

10、SPECIFICATIONS GENERAL Frequency range: 450480 MHz Type of emission: 16K0F3E / 8K50F3E Frequency resolution: 25 or 12.5 kHz Number of channels: Max. 32 channel Antenna connector:N-type2 (50 ) Power supply requirement: 100120 V AC120V VERSION 220240 V AC220V VERSION 13.6 V (negative ground) Current d

11、rain (at 13.6 V): Less than 20 A (TX) Less than 1A (RX standby) Less than 2A (RX max power) Operating temperature range: 30C to +60C (22F to +140F) Dimensions (projections not included): 410 (W) 110(H) 360(D) mm 16.1 (W) 4.3(H) 14.1(D) inch Weight : 12 kg (26.5 lb) TRANSMITTER Output power: 50 W Mod

12、ulation system: Variable reactance frequency modulation Max. frequency deviation: 5.0 kHz (Wide) / 2.5 kHz (Narrow) Spurious emissions: 70 dBc typical Adjacent channel power: More than 70 dB (Wide) More than 60 dB (Narrow) Input impedance: 600 RECEIVER Receiving system: Double conversion superhetero

13、dyne system Intermediate frequency: 1st; 70 MHz 2nd; 455 kHz Sensitivity (12 dB SINAD): 0.5 V; 12 dB SINAD Adjacent channel selectivity: More than 70 dB (Wide) More than 60 dB (Narrow) Spurious response: More than 70 dB Intermodulation: More than 70 dB Audio output power: 2.5 W at 10% distortion wit

14、h an 4 load Audio output impedance: 4 All stated specifications are subject to change without notice or obligation. 2 - 1 JACK1 unit* FRONT unit JACK2 unit* TX unit RX unit 50PA unit REG unit LOGIC unit* SECTION 2INSIDE VIEWS BOARD LAYOUT *: Located under side of this point. 50PA UNIT Top view Temp

15、sensor (IC4: NJM2107F D1: MA29WB) Pre-drive (IC1: SC-1323) Power amplifier (Q2: 2SC3102) +8V REG (IC3: TA7808F) APC amplifier (IC2: TA75S01F) YGR amplifier (Q1: 3SK3475) +9V switching (Q5: 2SA1362) 2 - 2 LOGIC UNIT Top view Bottom view Splatter filter (IC4: NJM2902V) CTCSS decoder (IC29: FX805) OFF-

16、HOOK CTRL (IC47: LC73701M, IC50: TC4W53) D/A converter (IC25: M62364) Mic mix amplifier (IC2: NJM2902V) Mic amplifier (IC1: NJM2902V) Mic mute (IC13: BU4066) LED current CTRL (Q18, Q19, Q20: XP1114) Temperature switching (IC32: TC4W53) MIC amplifier, Limitter (IC3: NJM2902V) ON-HOOK signal output (I

17、C45: LM567M) Hipass filter, De-emphasis (IC9: NJM2902V) RESET (IC34: S-80842C) CPU (IC33: HD64F2238F) Ringer detect circuit (IC33: HD64F2238F) EEPROM (IC39: BU4094) DTMF decoder (IC30: TC4W53, IC31: LC738M) 2 - 3 TX UNIT Top view *: Located under side of this point. RX UNIT Top view *: Located under

18、 side of this point. PLL reference oscillator 12.8 MHz (X1: CR-732) PLL IC* (IC2: MB15A02PFV1) TX VCO circuit Mixer (IC6: NJM2107F) D/A converter* (IC5: M62364FP) RF amplifier (Q1: 2SC5337) PLL IC* (IC4: MB15A02PFV1) RX VCO circuit IF amplifier (Q3: 2SK1771) 2nd Lo oscillator 69.545 MHz (X2: CR-729)

19、 IF IC (IC2: TA31136FN) Noise amplifier (IC8: NJM2902V) Reference oscillator 12.8 MHz (X3: CR-732) Mixer (IC1: GN2011) Lo amplifier* (Q8: 2SC4226, Q9: 2SC4703) SECTION 3CIRCUIT DESCRIPTION 3 - 1 3-1 RECEIVER CIRCUITS 3-1-1 RF CIRCUIT (RXUNIT) Received signals from the RX antenna connector enter the

20、RX unit J1 and pass through a tuned bandpass filter ( D3, D4, L1L3, L32, C2, C5C8, C10C12, C14, C205, C206, C210,) which is controlled by the D/a converter IC (LOGIC unit; IC25). The filtered signals are applied to an PRE-ampli- fier (Q1). The amplified signal are applied to a bandpass fil- ter (D6,

21、 D7, L6, L7, C21, C22, C24, C, 26C28, C30, C207, C208) and are then applied to the 1st mixer circuit. 3-1-2 1ST MIXER AND 1ST IF CIRCUITS (RX UNIT) The 1st mixer circuit converts the received signals to a fixed frequency of the 1st IF signal with the PLL output frequency. By changing the PLL frequen

22、cy, only the desired frequency will pass through a crystal filter at the next stage of the 1st mixer. The filtered signals are applied to the 1st mixer circuit (L8, L9, L10, IC1), and are then mixed with the 1st LO signal from the PLL circuit to produce a 70MHz 1st IF signal. The 1st IF signal passe

23、s through a MCF (Monolithic Crystal Filter; FI1) to suppress out-of-band signals. The filtered sig- nal is applied to the 2nd mixer circuit (IC2, pin 16) via the buffer amplifier (Q3). 3-1-3 2ND IF AND DEMODULATOR CIRCUITS (RX UNIT) The 2nd mixer circuit converts the 1st IF signal to a 2nd IF signal

24、. A double-conversion superheterodyne system improves the image rejection ratio and obtains stable receiv- er gain. The amplified signal is applied to the 2nd mixer section of the FM IF IC (IC2, pin 16), and is then mixed with the 2nd LO signal for conversion to a 455 kHz 2nd IF signal. The 455 kHz

25、2nd IF signal is applied to a ceramic bandpass filter (narrow; FI5, wide; FI6) where unwanted signals are suppressed, and are then applied to a limiter amplifier sec- tion in the system IC (IC2, pin 5). IC2 contains the 2nd mixer, limiter amplifier, quadrature detector, active filter and noise ampli

26、fier circuits, etc. The local oscillator section and X2 generate 69.545 MHz for the 2nd LO signal. The 2nd IF signal is then amplified at the limiter amplifier section (IC2, pin 5) and applied to the quadrature detector section (IC2, pins 10, 11 and X1) to demodulate the 2nd IF signal into AF signal

27、s. The AF signals are output from pin 9 (IC2) and are then applied to the AF amplifier circuit on the LOGIC unit. 3-1-5 AF AMPLIFIER CIRCUIT (LOGIC UNIT) The AF amplifier circuit amplifies the demodulated AF sig- nals to drive a speaker. The AF signals from the FM IF IC (RX unit; IC2, pin 9) is appl

28、ied to the buffer amplifier (IC9). The amplified signals passes through the high-pass filter (IC9, pins 5, 7, 12, 14) which removes CTCSS or DTCS signals. The filtered AF signals are output from pin 7 (IC9) and are applied to the de-emphasis circuit (IC9, pins 1, 2) with fre- quency characteristics

29、of 6 dB/octave, and then passed through the low-pass filter (IC10, pins 1, 3, 5, 7). The filtered signal is applied to the volume control (VR unit; R1) to con- trol the audio level. The output AF signals from the volume control (VR unit; R1) pass through the analog switch (IC16; pins 1, 7) and are t

30、hen applied to the AF power amplifier (IC17) to drive the speaker. 2ND IF AND DEMODULATOR CIRCUITS (RX UNIT) FI5 2nd IF filter 455 kHz IF amp. QUAD. detector Active filter DISC signals to LOGIC unit J1 X1 RSSI 2nd Mixer X2 1st IF from the IF amplifier (Q3) RSSI signal to the CPU 87531 161311109 IC2

31、TA31136FN Noise comp. Noise amp. 12 FI6 N-DET to the CPU SQL signal to the LOGIC unit J1 NARROW WIDE 3 - 2 3-1-6 RECEIVER MUTE CIRCUITS (LOGIC UNIT) NOISE SQUELCH The noise squelch circuit cuts out AF signals when no RF signals are received. By detecting noise components in the AF signals, the squel

32、ch circuit switches the AF mute switch. Some noise components in the AF signals from the FM IF IC (RX unit; IC2, pin 9) are passed through the SQL level con- troller (VR unit; R2). The level controlled signals are applied to the active filter section in the FM IF IC (RX unit; IC2, pin 8). Noise comp

33、onents about 10 kHz are amplified and out- put from pin 7 (RX unit; IC2). The filtered signals are converted to the pulse-type signals at the noise detector section and output from pin 13 (RX unit; IC2). The NDET signal from the FM IF IC (RX unit; IC2) is applied to the CPU (IC33, pin 40). The CPU a

34、nalyzes the noise con- dition and controls the AF mute signal via “AFMUTE1” line (IC40, pin 4) to the AF mute switch (IC16). CTCSS AND DTCS The tone squelch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (CTCSS or DTCS). The CTCSS

35、signal passes through the low-pass filter circuit (IC8) and is then applied to the CTCSS decoder IC (IC29). The detected signal is applied to the CPU (IC 33) via the ser- ial signal line. The DTCS signal passes through the low-pass filter circuit (IC12), and is then applied to the DTCS decoder which

36、 is inside the CPU (IC33, pin 52) via the “DTCSI” line. The 2/5TONE signals are pass through the low-pass filter circuit (IC12), and are then applied to the 2/5TONE decoder which is inside the CPU (IC33 pin 51) via “25TI” line. The DTMF signal passes through the DTMF switch IC (IC30), and is then ap

37、plied to the DTMF decoder which is inside the CPU (IC33, pins 82, 85, 86). The DTMF switch (IC30) selects the signal from telephone line or RX unit. 3-2 TRANSMITTER CIRCUITS 3-2-1 AF AMPLIFIER CIRCUIT (LOGIC UNIT) IN CASE OF THE AF SIGNAL FROM THE MIC JACK The AF signals (MIC) from the MIC jack (FRO

38、NT unit; J7) are amplified at the AF amplifier (IC1). The amplified signals are mixed with the “E_MOD”, “E_MOD2” and “TELAFO” sig- nals from IC1. The mixed signals pass though the high-pass filter (IC2) via the pre-emphasis circuit (IC2). The filtered signals are applied to the limiter amplifier, an

39、d are then mixed with the DTMF signal from the CPU (IC33, pin 43) via TX-signal filter (IC3). The mixed signal applied to the splatter filter (IC4). TONE SIGNALS CIRCUITS (LOGIC UNIT) DTMF SW LPF LPF LPF AMP AMP CTCSS DTCS 2/5TONE DTMF CTCSS DETECTOR DTMF DECODER CPU; IC33 DATA BUS DATA BUS DISC sig

40、nal from RX unit To AF amplifier AMP IC9 IC8 IC12 IC31 IC30 IC29 AF AMPLIFIER CIRCUITS (LOGIC UNIT) AMP AMP AMP AMPSW-D SW-C SW-B SW-A AMP MIX PRE EMP HPFLIMIT SIG MIX SPLAT FIL RPT AF MUTE LPF E_MOD3 To TX unit From the FRONT unit RPT AF signal from IC25 From the telephone circuit From the REMOTE c

41、onnector From the ACC connector From the REMOTE connector 25TONE BEEP CW DTMF From CPU (IC33) MIC E_MOD TELAFO E_MODE2 IC13 MIC MUTE AFATTO IC2 IC3IC3 IC4 IC26 IC14 3 - 3 IN CASE OF THE AF SIGNAL FROM THE ANTENNA CONNECTOR The AF signals (received signals) from the antenna connec- tor (RX unit; J1) are applied to the buffer amplifier (IC9), CTCSS detector (IC29) and AF amplifier (IC6). The ampli- fied signals are applied to the expander IC (IC25) to adjust to a level needed. The adjusted signals pass through the RPT AF mute switch (IC14), and ar