Icom_IC-M710RT_serv.pdf

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1、SERVICE MANUAL MF/HF MARINE TRANSCEIVER iM710RT IC-M710RT-00 99.6.23 11:10 AM Page 1 INTRODUCTION This service manual describes the latest service information for the IC-M710RT MF/HF MARINE TRANSCEIVER at the time of publication. To upgrade quality, any electrical or mechanical parts and internal ci

2、rcuits are subject to change without notice or obligation. DANGER NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than 16 V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power sup

3、ply when connecting the transceiver. DO NOT apply an RF signal of more than 20 dBm (100 mW) to the antenna connector. This could damage the trans- ceivers front end. ORDERING PARTS Be sure to include the following four points when ordering replacement parts: 1. 10-digit order numbers 2. Component pa

4、rt number and name 3. Equipment model name and unit name 4. Quantity required 1160000130 ICTD62783AFIC-M710RTMAIN UNIT 05 pieces 8810009400 ScrewPH M3x8 SUS ZK IC-M710RTRear panel 10 pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES 1. Make sure a problem is i

5、nternal before disassembling the transceiver. 2. DO NOT open the transceiver until the transceiver is dis- connected from its power source. 3. DO NOT force any of the variable components. Turn them slowly and smoothly. 4. DO NOT short any circuits or electronic parts. An insu- lated tuning tool MUST

6、 be used for all adjustments. 5. DO NOT keep power ON for a long time when the trans- ceiver is defective. 6. DO NOT transmit power into a signal generator or a sweep generator. 7. ALWAYS connect a 50 dB to 60 dB attenuator between the transceiver and a deviation meter or spectrum ana- lyzer when us

7、ing such test equipment. 8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver. IC-M710RT-00 99.6.23 11:10 AM Page 2 TABLE OF CONTENTS SECTION 1 SPECIFICATIONS SECTION 2INSIDE VIEWS SECTION 3CIRCUIT DESCRIPTION 3 - 1RECEIVER CIRCUITS. 3 - 1 3 - 2TRANSMI

8、TTER CIRCUITS. 3 - 3 3 - 3PLL CIRCUITS. 3 - 6 3 - 4PORT ALLOCATIONS . 3 - 6 SECTION 4ADJUSTMENT PROCEDURES 4 - 1PREPARATION BEFORE SERVICING . 4 - 1 4 - 2INTERFACE ADJUSTMENTS . 4 - 2 4 - 3PLL ADJUSTMENT. 4 - 3 4 - 4TRANSMITTER ADJUSTMENT. 4 - 4 4 - 5RECEIVER ADJUSTMENT. 4 - 8 SECTION 5PARTS LIST SE

9、CTION 6MECHANICAL PARTS AND DISASSEMBLY SECTION 7SEMI-CONDUCTOR INFORMATION SECTION 8BOARD LAYOUTS 8 - 1RC-21 8 - 1 - 1LOGIC BOARD. 8 - 1 8 - 1 - 2SENSOR 1/2 BOARDS . 8 - 3 8 - 1 - 3MIC BOARD. 8 - 3 8 - 1 - 4VR1 BOARD. 8 - 3 8 - 1 - 5VR2 BOARD. 8 - 3 8 - 1 - 6CTRL1 BOARD. 8 - 4 8 - 2IC-M710RT 8 - 2

10、- 1CTRL2 BOARD. 8 - 5 8 - 2 - 2TERMINAL UNIT . 8 - 5 8 - 2 - 3FILTER BOARD. 8 - 6 8 - 2 - 4MAIN BOARD. 8 - 7 8 - 2 - 5ALARM BOARD. 8 - 7 8 - 2 - 6PLL UNIT . 8 - 8 8 - 2 - 7PA150W BOARD. 8 - 9 SECTION 9BLOCK DIAGRAM SECTION 10VOLTAGE DIAGRAM IC-M710RT-00 99.6.23 11:10 AM Page 3 1 - 1 SECTION 1SPECIFI

11、CATIONS GENERAL Frequency coverage: Receive500 kHz29.9999 MHz Transmit1.60002.9999 MHz4.00004.9999 MHz 6.00006.9999 MHz8.00008.9999 MHz 12.000013.9999 MHz16.000017.9999 MHz 18.000019.9999 MHz22.000022.9999 MHz 25.000027.50000 MHz Mode: J3E (USB/LSB), H3E (AM), J2B (AFSK), F1B (FSK), R3E, A1A (CW) (A

12、vailable modes differ with version) Number of channels: 1136 channels (max.) Antenna impedance: 50 (nominal) Usable temperature range: 30C to +60C; 22F to +140F Frequency stability: 10 Hz (30C to +60C; 22F to +140F) (20 Hz above 15 MHz) Power supply requirement: 13.6 V DC 15% Negative ground Current

13、 drain (at 13.6 V DC): Transmit (max. output power) 30 A Receive (max. audio output)3.0 A DimensionsMain unit: 292(W)117(H)317(D) mm; 1112(W)41932(H)121532(D) in (projections not included) Controller: 292(W)116(H)66(D) mm; 1112(W)4916(H)21932(D) in WeightMain unit: 7.45 kg; 16 lb 7 oz Controller: 1.

14、2 kg; 2 lb 10 oz Remote connector: NMEA D-sub 9-pin (female) ACC 1 connector: DIN 8-pin (female) ACC 2 connector: DIN 7-pin (female) TRANSMITTER Output power (at 13.6 V DC): 150, 60, 20 W PEP (60, 20 W PEP only above 24 MHz) Spurious emissions: 65 dB Carrier suppressions: 40 dB Unwanted sideband sup

15、pression: 55 dB Microphone impedance: 600 RECEIVER Sensitivity: J3E, R3E, J2B, A1A, F1B0.5 V (1.800029.9999 MHz) (for 12dB SINAD)1.0 V (1.60001.7999 MHz) 6.3 V (0.50001.5999 MHz) H3E (for 10dB S/N)3.2 V (1.800029.9999 MHz) 6.3 V (1.60001.7999 MHz) 32 V (0.50001.5999 MHz) Spurious response rejection:

16、 More than 70 dB (1.600029.9999 MHz) Audio output power: 4.5 W typical (at 10% distortion with a 4 load) Audio impeadance: 4 to 8 Clarity variable range: 150 Hz All stated specifications are subject to change without notice or obligation. INAL board 50W, FILTER AND TERMINAL BOARDS W board Low-pass f

17、ilters (FILTER board) al switches 2) amplifiers Q4: 2SC2904) amplifiers Q2: 2SC3133) Power detector circuit 2 - 1 SECTION 2INSIDE VIEWS RF filter circuit 1st mixer circuit 1st IF filter (FL1: FL-120) PLL unit Noise blanker circuit 1st IF amplifier (Q8: 3SK131) PLL IC (IC5: LC7153M) DDS IC (IC1: SC-1

18、246A) Reference oscillator 30.000000 MHz (X1: CR-282) BFO DDS IC (IC2: SC-1287) ALARM board MAIN unit 2nd mixer circuit MAIN AND PLL UNITS 3-1 RECEIVER CIRCUITS 3-1-1 RF FILTER CIRCUIT (MAIN UNIT) Received signals from the antenna connector pass through the transmit/receive switching relay (FILTER b

19、oard RL17) and are then applied to the MAIN unit via J2. The signals pass through the protection relay (RL2), 1.6 MHz cut off high-pass filter (L2L4, C4C8, C629) and are then applied to one of nine bandpass filters (including one low-pass filter for below 2.0 MHz). These filters are selected by the

20、filter control signals (B0B8) as described in the table below. The filtered signals pass through the 30 MHz cut-off low- pass filter (L71, L72, C130C134, C618) and are then applied to the 1st mixer circuit (Q6, Q7). RF FILTERS USED 3-1-2 1ST MIXER AND IF CIRCUITS (MAIN UNIT) The 1st mixer circuit co

21、nverts the received signals into a fixed frequency, 69.0115 MHz 1st IF signal using the PLL output frequency. By changing the PLL frequency, only the desired frequency is picked up at the pair of crystal filters (FI1a, FI1b) at the next stage. The IF amplifier (Q8) and resonator circuits are designe

22、d between the filter pair. The PLL output signal (1LO) enters the MAIN unit via J3 and is amplified at the 1st LO amplifier (Q5) and then applied to the 1st mixer (Q6, Q7) 3-1-3 2ND MIXER AND IF CIRCUITS (MAIN UNIT) The 1st IF signal from the crystal filter (FI1b) is converted again into a 9.0115 MH

23、z 2nd IF signal at the 2nd mixer cir- cuit (D52, L66, L67). The 60 MHz 2nd local signal (2LO) from the PLL unit enters the MAIN unit via J4 to be applied to the 2nd mixer. The 2nd IF signal is passed through the noise blanker gate (D15, D16) and amplified at the 2nd IF amplifier (Q16) and then appli

24、ed to one of the 9 MHz IF filters as described below. The passed signal is amplified at the two stage 2nd IF amplifiers (Q32, Q33) and is applied to a demodulator cir- cuit (D39 for H3E or IC10 for J3E and others). 2ND IF FILTERS USED 3-1-4 NOISE BLANKER CIRCUIT (MAIN UNIT) The noise blanker circuit

25、 cuts off the IF circuit line at the moment of receiving a pulse-type noise. A portion of the 2nd IF signal between resonator circuits (L83, L84 after stage of the 2nd mixer, D52) is amplified at the noise amplifiers (Q9, IC8, Q11). The signal is then detected at the noise detector (D17) to convert

26、the noise components to DC voltages. The signals are then applied to the noise blanker switch (Q13, Q14). At the moment the detected voltage exceeds the Q13s threshold level, Q14 outputs a blanking signal to close the noise blanker gate (D15, D16) by applying reverse-biased voltage. Q15 turns the no

27、ise blanker circuit ON and OFF. 3 - 1 SECTION 3CIRCUIT DESCRIPTION Audio output Detector D39 Demodulator IC10 Other modes H3E Fl2 or Fl3/Fl4 2nd mixer D52Fl1a/Fl1b 1st mixer Q6, Q7 9.0115 MHz69.0115 MHz0.529.999 MHz 2nd LO: 60.0 MHz1st LO: 69.511599.0114 MHz BFO LPF or BPF J3E, J2B, R3E, FSK:9.0130

28、MHz FSK narrow, J2B narrow: 9.0123 MHz A1A:9.0116 MHz Crystal filter Crystal filter RECEIVE FREQUENCY CONSTRUCTION Frequency (MHz) 0.51.999 22.999 34.999 56.999 79.999 Frequency (MHz) 1013.999 1417.999 1823.999 2429.999 Control signal B5 B6 B7 B8 Control signal B0 B1 B2 B3 B4 Entrance coil L49 L8 L1

29、3 L18 L23 Entrance coil L28 L33 L38 L43 MODE J3E, R3E, FSK H3E FSK narrow, A1A narrow Used filter FI2 FI3/FI4 Optional narrow filter Control signal SEL8: low, H3E8: low SEL8: low, H3E8: high SEL8: high, H3E8: low 3 - 2 The detected voltage is also applied to the noise blanker AGC circuit (Q12, Q10)

30、and is then fed back to the noise amplifier (IC8) as a bias voltage. The noise blanker AGC cir- cuit prevents closure of the noise blanker gate for long peri- ods by non-pulse-type noise. The time constant of the noise blanker AGC circuit is determined by R58 and C114. 3-1-5 DEMODULATOR CIRCUIT (MAN

31、 UNIT) This circuit mixes the 2nd IF and BFO signals to pick up the AF components (except H3E mode). The 2nd IF signal from the 2nd IF amplifier (Q33) is applied to the balanced mixer (IC10, pin 1). The 9.01169.013 MHz BFO signal from the PLL unit is also applied to IC10 (pin 10). AF signals are out

32、- put from pin 6 and are then applied to the AF circuits. 3-1-6 H3E DETECTOR CIRCUIT (MAIN UNIT) The 2nd IF signal from the 2nd IF amplifier (Q33) is applied to the AM detector circuit (D39) to be demodulated into AF signals. The detected signals are amplified at the buffer amplifier (Q45) and then

33、applied to the AF circuits. 3-1-7 AGC CIRCUIT (MAIN UNIT) The AGC (Automatic Gain Control) circuit reduces IF ampli- fier gain to prevent the receiver circuit from distorting and to keep the audio output at a constant level. A portion of the IF signals from the 2nd IF amplifier (Q33) is detected at

34、the AGC detector circuit (D31) and is then applied to the AGC amplifier (Q41) to control the AGC time constant line. The reference voltage of the AGC line is con- trolled by the “RFG” line which comes from the CPU for the RF gain setting. When receiving a strong signal, the detected voltage increase

35、s and the voltage of the AGC line is decreased by the AGC amplifier (Q41) via the 5 V voltage line. The AGC line is used for the bias voltage of the IF amplifiers (Q8, Q16, Q32, Q33), so that these amplifiers reduce gain. When the strong signal disappears, the AGC line voltage is released by C245/R2

36、68 and C670/R813. The AGC switch (Q42, D38) turns the AGC circuit OFF when the AGC OFF function activates. The AGC-fast switch (Q131) sets the AGC line as fast-release during scanning and A1A mode selection. 3-1-8 S-METER CIRCUIT (MAIN UNIT) The S-meter indicates the AGC level on the display, since

37、the AGC level varies with the received signal strength. The AGC bias voltage (AGC time constant line) from the AGC amplifier (Q41) is inverted and amplified at the meter amplifier (IC19b). The amplified signal is applied to the CPU via the “RSM” line. 3-1-9 AF AMPLIFIER CIRCUITS (MAIN UNIT AND LOGIC

38、 BOARD) AF signals from the demodulator or H3E detector circuits pass through the active low-pass filter (IC20b) and squelch gate (IC12a), and are then divided into the AF amplifier cir- cuit and AF activated squelch circuit. The divided AF signals are applied to the CTRL2 board via the buffer ampli

39、fier (IC42). The AF signals are converted into PWM signal at the PWM modulation circuit (IC4, Q11) via the AF amplifier (CTRL2 board; IC5), and are applied to the serial interface IC (IC1). The serial interface IC outputs PWM signal to the CTRL1 board (RC-21) via a coaxial cable. The PWM signal from

40、 the IC-M710RT is applied to the LOGIC board after being converted into an analog signal by passing though the serial interface IC (IC1) on the CTRL1 board. The AF signals are applied to the electronic volume control (LOGIC board; IC9). The CPU (pin 39) outputs the volume control signal (1 to 5 V) a

41、ccording to the VOLUME control setting. The AF output signals from IC9 (pin 5) are amplified at the AF power amplifier (IC8) and then applied to the internal speaker via the microphone connector (pins 3 and 4). The speaker switch relay (RL1) is connected to the () ter- minal of the internal speaker for the SPEAKER switch func- tion. Q42 Q41 C670 R8