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1、VHF TRANSCEIVER iF110 iF111 iF121 SERVICE MANUAL INTRODUCTION This service manual describes the latest service information for the IC-F110, F111 and F121 VHF TRANSCEIVER at the time of publication. DANGER NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than 16 V.
2、 This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 20 dBm (100 mW) to the antenna connector. This could damage the transceiv- ers front
3、end. ORDERING PARTS Be sure to include the following four points when ordering replacement parts: 1. 10-digit order numbers 2. Component part number and name 3. Equipment model name and unit name 4. Quantity required 1110003490S.ICTA31136FNIC-F110MAIN UNIT5 pieces 8810009990 ScrewPH BT M38 ZKIC-F110
4、 Bottom cover 10 pieces Addresses are provided on the inside back cover for your convenience. REPAIR NOTES 1. Make sure a problem is internal before disassembling the transceiver. 2. DO NOT open the transceiver until the transceiver is disconnected from its power source. 3. DO NOT force any of the v
5、ariable components. Turn them slowly and smoothly. 4. DO NOT short any circuits or electronic parts. An insu- lated tuning tool MUST be used for all adjustments. 5. DO NOT keep power ON for a long time when the trans- ceiver is defective. 6. DO NOT transmit power into a signal generator or a sweep g
6、enerator. 7. ALWAYS connect a 40 dB to 50 dB attenuator between the transceiver and a deviation meter or spectrum ana- lyzer when using such test equipment. 8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver. To upgrade quality, any electrical or mec
7、hanical parts and internal circuits are subject to change without notice or obligation. MODEL IC-F110 IC-F111 IC-F121 VERSION Europe General General U.S.A. SYMBOL EUR GEN GEN USA TABLE OF CONTENTS SECTION 1SPECIFICATIONS SECTION 2INSIDE VIEW SECTION 3DISASSEMBLY INSTRUCTIONS SECTION 4CIRCUIT DESCRIP
8、TION 4 - 1RECEIVER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 1 4 - 2TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 2 4
9、- 3PLL CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 3 4 - 4POWER SUPPLY CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4 4 - 5
10、PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4 SECTION 5ADJUSTMENT PROCEDURES 5 - 1PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11、. . . . . . . . . . .5 - 1 5 - 2PLL ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 4 5 - 3SOFTWARE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12、 . . . . . .5 - 5 SECTION 6PARTS LIST SECTION 7MECHANICAL PARTS AND DISASSEMBLY SECTION 8SEMI-CONDUCTOR INFORMATION SECTION 9BOARD LAYOUTS 9 - 1FRONT UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 1 9 - 2
13、MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 - 3 SECTION 10BLOCK DIAGRAM SECTION 11VOLTAGE DIAGRAMS 11 - 1 FRONT UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14、. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 - 1 11 - 2 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2 EXPLICIT DEFINITIONS 136 174 MHz FREQUENCY COVERAGECHANNEL SPACING Narrow/Wide-t
15、ype Narrow/Middle-type 12.5 kHz/ 25.0 kHz 12.5 kHz/ 20.0 kHz 15.0 kHz/ 30.0 kHz 1 - 1 SECTION 1SPECIFICATIONS All stated specifications are subject to change without notice or obligation. Measurement method Frequency coverage Type of emission Number of conventional channels Antenna impedance Power s
16、upply voltage (negative ground) Current drain (approx.) Usable temperature range Dimensions (proj. not included) Weight RF output power Modulation system Maximum permissible deviation Frequency error Spurious emissions Adjacent channel power Audio frequency response Audio hormonic distortion FM hum
17、and noise (typical) (without CCICT filter) Residual modulation (typical) (with CCICT filter) Limitting charact of modulator Microphone connector Receive system Intermediate frequencies Sensitivity (typical) Squelch sensitivity (at threshold) Hum and noise Adjcent channel selectivity Spurious respons
18、e Intermoduration Audio output power External SP connector GEN, USAEUR RECEIVERTRANSMITTERGENERAL EIA-152-C/204D or TIA-603 ETS 300 086 136.000174.000 MHz N/W: (12.5 kHz; Narrow/25 kHz; Wide): 8K50F3E/16K0F3EEUR (12.5 kHz; Narrow/25 kHz; Wide): 11K0F3E/16K0F3EGEN (15 kHz; Narrow/30 kHz; Wide): 11K0F
19、3E/16K0F3EUSA N/M (12.5 kHz; Narrow/20 kHz; Middle): 8K50F3E/14K0F3EEUR maximum 128 channels 50 nominal (SO-239) 13.6 V DC nominal13.2 V DC nominal TX; 7.0 A (at 25 W), 14.0 A (at 50 W) Rx; 1200 mA(maximum audio) 300 mA(stand-by) 30C to +60C (22F to +140F)25C to +55C 150(W) 40(H) 117.5(D) mm; 52932(
20、W) 4916(H) 458(D) inch25 W 150(W) 40(H) 167.5(D) mm; 52932(W) 4916(H) 61932(D) inch50 W 0.8 kg; 1 lb 12 oz 25 W, 1.1 kg; 2 lb 7 oz 50 W High/Low2/Low1: 25 W/10 W/2.5 W25 W High/Low2/Low1: 50 W/25 W/5 W50 W Variable reactance frequency modulation 2.5 kHz Narrow, 4.0 kHz Middle, 5.0 kHz Wide 5.0 ppm1.
21、5 kHz 70 dB (typical)0.25 W 1GHz, 1.0 W 1 GHz 60 dB minimum Narrow; 70 dB minimum Middle, Wide +2 dB to 5 dB of 6 dB/octave Range from 300 Hz to 2550 Hz Narrow / 3000 Hz Middle, Wide 3% typical at 1 kHz (40% deviation) 34 dB (min.), 40 dB (typ.) Narrow 40 dB (min.), 46 dB (typ.) Wide 40 dB (min.), 5
22、0 dB (typ.) Narrow 43 dB (min.), 53 dB (typ.) Middle 45 dB (min.), 55 dB (typ.) Wide 70 100% of maximum deviation 8-pin modular (600 ) Double-conversion superheterodyne system 1st: 46.35 MHz, 2nd: 450 kHz 0.25 V typical at 12 dB SINAD4 dBV (emf) typical at 20 dB SINAD 0.25 V typical4 dBV (emf) typic
23、al 34 dB (min.), 40 dB (typ.) Narrow 40 dB (min.), 50 dB (typ.) Narrow 40 dB (min.), 45 dB (typ.) Wide 43 dB (min.), 53 dB (typ.) Middle 45 dB (min.), 55 dB (typ.) Wide 60 dB (min.), 65 dB (typ.)Narrow 70 dB (min.), 75 dB (typ.)Middle/Wide 75 dB 70 dB (min.), 74 dB (typ.)65 dB (min.), 67 dB (typ.) 4
24、 W typical at 10% distortion with a 4 load 2-conductor 3.5 (d) mm (18)/4 2 - 1 SECTION 2INSIDE VIEW Antenna switch/ Low-pass filter circuit Mixer* (Q3: 3SK299) 2nd IF filter* (FI2: ALFYM450F=K) D/A converter* (IC6: M62363FP-650C) IF IC (IC1: TA31136FN) 1st IF filter (FI1: FL-335) * Located under sid
25、e of the point. Final FET module (IC3: S-AV33) CPU 5V regurator* (IC10: AN78L05M) 8V regurator (IC9: TA7808F) VCO circuit AF amplifier (IC8: LA4425A) Reference crystal oscillator* (X2: CR-740 15.3 MHz) PLL IC (IC4: MB15A02PFV-1) 3 - 1 SECTION 3DISASSEMBLY INSTRUCTIONS Opening case Unscrew 4 screws A
26、, and remove the bottom cover. Disconnect the flat cable B from J2. Disconnect the cable C from J7. Unscrew 2 screws D, and remove the front unit. B C D A J2 J7 Unscrew 8 screws E. Remove the filter case F. Unscrew the screw G. Unsolder 3 points H from the antenna connector. Unsolder 4 points I from
27、 IC3. E F G H I Lift up the front portion of the main unit and remove it. Installation location UT-105SmarTrank 2 logic board UT-108DTMF decoder unit UT-109 Voice scrambler unit UT-110 UT-111Trunking unit OPC-617ACC cable (for external terminal connection) UT-105 UT-108 UT-109 UT-110 UT-111 OPC-617
28、J1 J6 SECTION 4CIRCUIT DESCRIPTION 4 - 1 4-1 RECEIVER CIRCUITS 4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT) The antenna switching circuit functions as a low-pass filter while receiving and as resonator circuit while transmitting. This circuit does not allow transmit signals to enter the receiver circ
29、uits. Received signals enter the antenna connector and pass through the low-pass filters (L1L3, C1, C2, C68). The fil- tered signals are then applied to the RF circuit passed through the 4type antenna switching circuit (D5D7, D48, L4, L6). 4-1-2 RF CIRCUIT (MAIN UNIT) The RF circuit amplifies signal
30、s within the range of frequen- cy coverage and filters out-of-band signals. The signals from the antenna switching circuit pass through the two-stage tunable bandpass filters (D8, D4). The filtered signals are amplified at the RF amplifier (Q2) and then enter other two-stage bandpass filters (D9, D1
31、0) to suppress unwanted signals. The filtered signals are applied to the 1st mixer circuit (Q3). The tunable bandpass filters (D4, D8D10) employ varactor diodes to tune the center frequency of the RF passband for wide bandwidth receiving and good image response rejec- tion. These diodes are controll
32、ed by the CPU (FRONT unit; IC1) via the D/A converter (IC6). The gate control circuit reduces RF amplifier gain and atten- uates RF signal to keep the audio output at a constant level. The receiver gain is determined by the voltage on the “RSSI” line from the FM IF IC (IC1, pin 12). The gate control
33、 circuit (Q1) supplies control voltage to the RF amplifier (Q2) and sets the receiver gain. When receiving strong signals, the “RSSI” voltage increases and the gate control voltage decreases. As the gate control voltage is used for the bias voltage of the RF amplifier (Q2), then the RF amplifier gai
34、n is decreased. 4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT) The 1st mixer circuit converts the received signals to a fixed frequency of the 1st IF signal with the PLL output frequency. By changing the PLL frequency, only the desired frequency will pass through a MCF (Monolithic Crystal Filter; F
35、I1) at the next stage of the 1st mixer. The RF signals from the bandpass filter are applied to the 1st mixer circuit (Q3). The applied signals are mixed with the 1st LO signal coming from the RX VCO circuit (Q14) to pro- duce a 46.35 MHz 1st IF signal. The 1st IF signal passes through a MCF (Monolit
36、hic Crystal Filter; FI1) to suppress out-of-band signals. The filtered signal is amplified at the 1st IF amplifier (Q4) and applied to the 2nd IF circuit. 4-1-4 2ND IF AND DEMODULATOR CIRCUITS (MAIN UNIT) The 2nd mixer circuit converts the 1st IF signal to a 2nd IF signal. A double-conversion superh
37、eterodyne system improves the image rejection ratio and obtains stable receiv- er gain. The 1st IF signal from the 1st IF amplifier (Q4) is applied to the 2nd mixer section of the FM IF IC (IC1, pin 16) and is then mixed with the 2nd LO signal for conversion to a 450 kHz 2nd IF signal. IC1 contains
38、the 2nd mixer, limiter amplifier, quadrature detector, active filter and noise amplifier circuits, etc. A tripled frequency from the PLL reference oscillator is used for the 2nd LO signal (45.9 MHz). The 2nd IF signal from the 2nd mixer (IC1, pin 3) passes through a ceramic filter (FI2) to remove un
39、wanted hetero- dyned frequencies. It is then amplified at the limiter amplifi- er section (IC1, pin 5) and applied to the quadrature detec- tor section (IC1, pins 10, 11 and X1) to demodulate the 2nd IF signal into AF signals. The AF signals are output from pin 9 (IC1) and are then applied to the AF
40、 amplifier circuit. FI2 2nd IF filter 450 kHz Noise detector Q34 Limiter amp. FM detector Active filter AF signals SQLIN signal 5V X1 Discriminator RSSI Mixer X2 15.3 MHz 45.9 MHz 1st IF from the IF amplifier (Q4) RSSI signal to the CPU NOIS signal to the CPU 875 BPF 32 3 161311109 IC1 TA31136FN 2ND
41、 IF AND DEMODULATOR CIRCUIT 4 - 2 4-1-5 AF AMPLIFIER CIRCUIT (MAIN UNIT) The AF amplifier circuit amplifies the demodulated AF sig- nals to drive a speaker. The AF signals from the FM IF IC (IC1, pin 9) are applied to the active filter circuit (IC16). The active filter circuit (high- pass filter) re
42、moves CTCSS or DTCS signals. The filtered AF signals are output from pin 14 (IC16) and are applied to the de-emphasis circuit (R117, C378) with fre- quency characteristics of 6 dB/octave, and then passed through the analog switch (IC14, pins 13) and low-pass fil- ter (IC5). The filtered signal is ap
43、plied to the electronic vol- ume controller (IC6, pin 9). The output AF signals from the electronic volume controller (IC6, pin 10) are passed through the analog switch (IC14 pins 911) and are applied to the AF amplifier (IC15) and AF power amplifier (IC8) to drive the speaker. 4-1-6 RECEIVER MUTE C
44、IRCUITS (MAIN AND FRONT UNITS) NOISE SQUELCH The noise squelch circuit cuts out AF signals when no RF signals are received. By detecting noise components in the AF signals, the squelch circuit switches the AF mute switch. Some noise components in the AF signals from the FM IF IC (IC1, pin 9) are pas
45、sed through the level controller (IC6, pins 1, 2). The level controlled signals are applied to the active fil- ter section in the FM IF IC (IC1, pin 8). Noise components about 10 kHz are amplified and output from pin 7. The filtered signals are converted to the pulse-type signals at the noise detect
46、or section and output from pin 13 (NOIS). The NOIS signal from the FM IF IC is applied to the CPU (FRONT unit; IC1, pin 53). The CPU then analyzes the noise condition and controls the AF mute signal via “AFON” line (D44, D45) to the AF mute circuit (Q35, Q36, D29, D30). CTCSS AND DTCS The tone squel
47、ch circuit detects AF signals and opens the squelch only when receiving a signal containing a matching subaudible tone (CTCSS or DTCS). When tone squelch is in use, and a signal with a mismatched or no subaudible tone is received, the tone squelch circuit mutes the AF signals even when noise squelch
48、 is open. A portion of the AF signals from the FM IF IC (IC1, pin 9) passes through the low-pass filter (IC16) to remove AF (voice) signals and is applied to the CTCSS or DTCS decoder inside the CPU (FRONT unit; IC1, pin 60) via the “CDEC” line to control the AF mute switch. 4-2 TRANSMITTER CIRCUITS
49、 4-2-1 MICROPHONE AMPLIFIER CIRCUIT (MAIN AND FRONT UNITS) The microphone amplifier circuit amplifies audio signals within +6 dB/octave pre-emphasis characteristics from the microphone to a level needed for the modulation circuit. The AF signals (MIC) from the MIC jack (FRONT unit; J1) are amplified at the AF amplifier (FRONT unit; IC5) and applied to the MAIN unit via J2 (pin 28). The AF signal are applied to the limiter amplifier (IC5, pin 5). The entered signals are pre-emphasized with +6dB/octave at a limiter amplifier, then passe