Anritsu HFE0104_Vye 电路图.pdf

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1、56High Frequency Electronics High Frequency Design VCO CHARACTERIZATION Improving VCO Phase Noise Performance Through Enhanced Characterization By David Vye Ansoft Corporation M inimizing phase noise is a con- cern of VCO designers because of its direct impact on system performance. Reduction of pha

2、se noise begins with noise characteriza- tion and continues through modeling and sim- ulation of the design. Many factors affect the accuracy of a phase noise simulation and mea- surement, and all can be accurately addressed through the use of phase noise simulation along with prudent passive compon

3、ent selec- tion and resonator modeling. Optimum results can best be achieved when the considerations described in this article are followed. The Ansoft Designer EDA tools will be used as the reference in this discussion. In order to ensure an acceptable level of simulation accuracy for VCOs operatin

4、g at RF frequencies and above, every component of the linear network including transmission lines and discontinuities must be accurately charac- terized to several harmonics of the fundamen- tal oscillation frequency. This is essential because the accuracy of the oscillation signal (which affects th

5、e noise analysis) and the noise analysis itself greatly depend on the linear network. As a result, any inaccuracies in the linear network characterization will affect the quality of the systems phase noise simulation. To obtain the best results, the simulation should accurately reflect what will ult

6、imately be fabricated, including actual circuit board dimensions and material properties as well as valid component models of any parasitic behavior. For surface mount components, engi- neers often rely on equivalent circuit models or measured S-parameters to represent these parts. While component v

7、endors may be able to manufacture and characterize their parts through measurements, board designers need an alternative method for determining circuit performance before fabrication. By equating physical attributes directly to electrical performance, electromagnetic (EM) simulation is ideal for boa

8、rd characterization. As planar EM technology becomes faster and more integrated into the design process, many engineers are adapting its use for board mod- eling and design verification. Design environ- ments such as Ansoft Designer, which support the use of circuit components and planar EM co-simul

9、ation, allow engineers to simulate complete networks with surface mount compo- nent models and appropriately characterized board designs. The designer can incorporate a highly accurate electrical representation of the traces that define the circuit without hav- ing to generate a set of S-parameters

10、and manually insert this data. While the use of schematic-based dis- tributed models (Figure 1) offers a quick method for initial design and optimization, planar EM simulation eliminates the prob- lems associated with model validity caused by range restrictions (such as ratios of width to height) an

11、d arbitrary geometries that can be difficult to model with discrete distributed models. EM simulation directly models com- plex trace metals and all their associated par- asitic effects such as interconnect coupling. If the simulation tools support planar EM parameterization along with circuit-plana

12、r EM hierarchical design, the overall circuit may be tuned and optimized through manipu- lation of the physical structure. Improved EDA tools allow engineers to easily test and optimize their designs dur- ing simulation, before the expensive and time-con- suming prototype phase From January 2004 Hig

13、h Frequency Electronics Copyright Summit Technical Media, LLC RadioFans.CN 收音机爱 好者资料库 58High Frequency Electronics High Frequency Design VCO CHARACTERIZATION One difficulty when applying EM- based simulations to a free-running oscillator with a high-Q resonator is the uncertainty of the nonlinear os

14、cillation frequency, which is linked to the resonator circuit. Characteriz- ing the resonator with fine frequency steps will reduce potential interpola- tion error at the cost of increased simulation time. The engineer must also remember to characterize the resonator at an appropriate number of harm

15、onic frequencies if an accu- rate phase noise simulation is to be obtained. This increase in frequency points can detract from the speed advances offered by todays more powerful planar EM tools. To avoid these problems, Ansoft Designer offers multiple methods of planar EM co-simulation that may be s

16、pecified by the user. For self-driven circuits such as an oscillator, the user may select the fast frequency sweep option to cover a broad frequency range using dynamic frequency steps. The fast frequency sweep option detects sharp resonances and auto- matically refines the step size to bet- ter cap

17、ture the changing impedances. Coarse frequency steps may be defined to eliminate EM simulations from being performed in regions out- side the range of likely oscillations or harmonics. For source-driven nonlin- ear circuits such as amplifiers, the user may select the discrete frequen- cy co-simulati

18、on option so that it is automatically employed only at the discrete harmonic frequencies speci- fied by the nonlinear simulation setup. The desired co-simulation attribute is easily specified through the EM component analysis options. An example of a circuit-planar EM-based resonator design is shown

19、 in Figures 2 and 3. The hierarchical approach to this design utilizes a 12- port planar EM “sub-design” that is electrically attached to all surface mount components, ports, and a DC source at the designs top-level. In the schematic view (Figure 3), the planar EM component is represented by the 12-

20、port symbol. The fully synchro- nized layout view shows details of the resonators physical attributes, including vias and footprints for all SMT components. By constructing the resonator with physical layouts of critical transmission lines and component footprints early in the design cycle, it is po

21、ssible to ensure that the struc- ture will be realizable. EM co-simula- tion verifies the structures results, and Ansoft Designer allows circuit and planar structure hierarchy and parameter passing so that variables created by the designer can be used to define geometries and then be swept during an

22、alysis for parametric studies. This allows the performance trade-offs between Q-factor, tuning range, output power, and phase noise to be analyzed. In addition, planar EM simulation may be used to exam- ine the current distribution in the structure, in order to investigate undesirable effects such a

23、s excessive coupling between an oscillator and buffer amplifier (Figure 4). With the tools in place to properly characterize the linear network, the engineer should then consider the nonlinear aspects of the simulation. Figure 1 VCO and buffer amplifier design based on lumped element and simple tran

24、smission line models. Figure 2 The VCO layout view, showing the physical design. Figure 3 Schematic view showing resonator EM structure as multi-port symbol. RadioFans.CN 收音机爱 好者资料库 60High Frequency Electronics High Frequency Design VCO CHARACTERIZATION It is imperative that the simulation resolve t

25、he nonlinear analysis with a sufficient number of harmonics in order to accurately simulate accurate power levels. To achieve high accura- cy, a convergence test should be run in which the number of harmonics for each analysis is increased and a plot is made of the desired output quanti- ty, e.g. po

26、wer and phase noise at a specific offset frequency versus the number of harmonics. Once the graph converges within a desired tolerance, it is possible to determine the mini- mum number of harmonics required to achieve that accuracy. The linear network must be accurately charac- terized to the freque

27、ncy represented by this minimum harmonic number. Obviously, the accuracy of the nonlinear model or models plays a large role in the quality of the overall simulation. The noiseless response of the nonlinear device model must be accurate in order to produce reason- able noise prediction of the overal

28、l circuit. The manner in which noise properties of a nonlinear model are characterized and implemented varies from simulator to simulator. In Ansoft Designer, the noise model for the active device consists of two con- tributions: the shot noise and the flicker noise. The flicker noise is determined

29、from the modeled flicker noise coefficient (KF), flicker noise exponent (AF), and the exponent defining the frequency of the flicker noise (FCP). Extracting the KF and AF is quite difficult, and extraction at low fre- quencies by direct measurement of the noise voltage at kilohertz fre- quencies may

30、 not provide valid results when the device is used at microwave frequencies. It is a good idea to build a reference oscillator that can be more easily characterized at a few hundred megahertz, so that noise characterization can be carried out with greater certainty.The flicker noise coefficients can

31、 then be extract- ed from the phase noise measure- ment of the reference oscillator. It may also be possible to extract bias- dependent KF from such a setup, as the flicker noise model in the transis- tor is somewhat idealized and using KF vs. bias can improve accuracy.The characteristic phase noise

32、 curves for both high-Q and low-Q oscillators are shown in Figure 5. Simulation accuracy is generally verified by comparing its results with measurement of the actual device. The designer should confirm that the fundamental and harmonic powers and bias currents compare well with measurement results

33、before perform- ing more difficult phase noise mea- surements. Experience has shown that the measured versus simulated fundamental output powers should agree to within 1 dB, and the har- monic powers should agree to within a few dB, with a looser tolerance on the higher harmonics. Finally, it is als

34、o important to remember that accurate phase noise measurements are quite difficult to achieve, and may be prone to error. Consequently, care must be exercised in making these measurements if the comparison of simulated results with hardware test data is to be meaning- ful. In addition, several metho

35、ds are commonly used to measure phase noise, and achieving the same results with each method to an agreement of 1 to 2 dB is difficult. However, by properly characterizing all linear and nonlinear components used in the phase noise simulation, along with a well-characterized phase noise mea- suremen

36、t system, accuracy levels within a few dB may be achieved. Summary Minimizing phase noise is essen- tial for any communications system to achieve its greatest potential. Since the VCO is one of the key con- tributors to overall phase noise per- formance, it is important to reduce its phase noise con

37、tribution as much as possible. While the guidelines for VCO simulation provided in this arti- cle are not the only ones designers must consider, they can help avoid pitfalls that can increase the time required to achieve excellent results. Author Information David Vye is Product Marketing Manager for Ansoft Designer. He can be reached by e-mail at: dvye Figure 4 Plot of current distribution in a linear network. Figure 5 Phase noise curves for both high-Q and low- Q oscillators. RadioFans.CN 收音机爱 好者资料库