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1、Model 7059 Low Voltage Scanner Plug-h Card Instruction Manual Publication Date: February 1989 Document Number: 7059-901-01 Rev. E RadioFans.CN 收音机爱 好者资料库 WARRANTY RadioFans.CN 收音机爱 好者资料库 SPECIFICAITONS MODEL 7059 LOW VOLTAGE SCANNER CARD CHANNELS PER CARD: 10. CONTACT CONFIGURATION: Z-pole Form A, c
2、ommon guard connection. CONNECTOR TYPE: Screw terminal, No. 18 AWG maximum wire size. RELAY DRIVE CURRENT: UmA per relay typical. MAXIMUM SIGNAL LEVEL: ZOOV, lOOmA, 2VA peak (resistive load). CONTACT LIFE: IO 8 10 closuvs (at maximum signal level). CONTACT RESISTANCE: Zfl to rated life. CONTACT POTE
3、NTIAL: l 6 Common Mode Isolation Test Setup . 9 9 Model 7058 Component Location Drawing . 13 10 Model 7059 Schematic Diagram . 15 LIST OF TABLES 1 Recommended Test Equipment, . 5 2 Model 7059 Replaceable Parts List. . 12 SECTION 1 GENERAL INFORMATION 1.1 INTRODUCTION The Model 7059 is a low-voltage
4、scanner plug-in card which is field- installable in the Model 705 and Model 706 scanner mainframes. The Model 7059 will switch up to 10 channels. For low-level transducer and thermo- couple output switching the Model 7059 is designed to introduce a minimum of thermal voltage error I l less than 2fI
5、at end of life. C. A guard surrounds all analog signal paths. 2. Installation- Refer to the Model 705 and Model 706 Instruction Manuals for scanner card installation instructions. 2.3 OPERATING CONSIDERATIONS 1. Signal Level- 1OV peak, 1OmA peak with a resistive load for expected life. Absolute maxi
6、mum peak instantaneous rating: 2OOV. lOOmA, or 2VA with a resistive load. 2. Isolation-Guarded interchannel resistance is nominally greater than 10t2fI and less than 1OpF at room temperature, at less than 70% relative humidity. 3. Maximum Levels-200V peak between signal line pairs or from signal lin
7、es to guard or mainframe (digital) common. 4. Operating Environment-O0 to 50C up to 35OC at 70% relative humidity. Figure 1. Plug-In Card Installation and Assembly 3 2.4 OPERATING HINTS The clamp-type screw terminals will accept up to #19 AWG wire. In order to ensure thermal offset less than l$/ sol
8、id copper wires should be used throughout the measurement hook-up. To most effectively eliminate error voltages produced by leakage currents. the GUARD terminal should be connected to the reference connection on the channel which is most sensitive to error (that is, the one which has the lowest sour
9、ce voltage versus the highest series resistance). For instance, two sources are connected to the Model 7059; one having an equivalent source of 1V with a series resistance of lOOk0, and the other having a source voltage of .lV with a lkn series resistance. The lOOk source resistance will develop 100
10、 times the error voltage as the lkt3 source resistance, Its source voltage however, is only ten times as large on the lV/lOOkn channel. The GUARD would therefore be connected to the reference point of this channel lsee Figure 21. Reactances in the system will cause transients during switching. These
11、 should not exceed the ratings given in the specifications. If they do, relay contact life will be degraded. Figure 2. How To Use GUARD Connection 4 SECTION 3 MAINTENANCE 3.1 INTRODUCTION This section contains a performance verification procedure. Since there is no calibration adjustments, no recali
12、bration is necessary. Recommended main- tenance would include inspection of the scanner plug-in board and card- edge connectors to ensure good electrical contact. In industrial environ- ments annual cleaning using dry nitrogen gas and FreonO TMS or TE is recommended. The verification procedure shoul
13、d be performed every 12 months or at the time maintenance is performed on the mainframe. 3.2 REQUIRED TEST EQUIPMENT Recommended test equipment is given in Table 1, Test equipment other than recommended may be substituted if specifications equal or exceed the stated characteristics. Table 1. Recomme
14、nded Test Equipment Thermal Cable I i Hinimum Specification !ero drift less than 150nV. TTL compatible square wave to 10Hz. and 1 pulse per 30 min. ItI Sensitivity rriggered Sweep TEK IO.OOV, 1OOVDC KI 1UOA Sensitivity KI dFG i Model KI 181 KI 1488 KI 1506 H-P 70358 705 195 1641 000 seriu 230 i14 or
15、 61 3.3 PERFORMANCE VERIFICATION This section gives procedures needed to verify that the operation of the Model 7059 is within specifications. The thermal offset should be carried out in a temperature controlled environment of 23O f 1C. Other tests may be performed within environmental limits given
16、in the specifications. 3.3.1 Thermal Offset Test 1. The input of the Model 181 should be shorted with the Model 1488 short- ing plug. After power is applied, the Model 181 should be allowed to stabilize for four hours. During this time the analog output of the Model 5 181 should be connected to the
17、chart recorder end a recording made to establish a baseline for the voltage measurements lsee Figure 3). 2. The 10 input connections on the Model 7059 plug-in card should be shorted together between HI end LO with a short piece of solid copper wire. That is, connect all the HI and LO terminals toget
18、her es shown in Figure 4. (The OUTPUT terminals of the Mods1 7059 should be connected to short copper wires to facilitate connecting the alligator clips on the Model 1506 cable.) With the Model 1506 cable attached to the output, the plug-in card should then be inserted into the mainframe and power a
19、p- plied to the mainframe. Set the Model 705 to the reset mods and allow it to warm up along with the Model 181. 3. After the warm up time has elapsed and a stable baseline is visible on the chart recorder, the shorting plug on the Model 181 should be removed and the Model 1506 cable from the Model
20、7059 connected in its place. Set the Model 705 scanner mainframe to Channel 1, Channel mode and the Single program mode. The scanner mainframe should now be clocked et a rate of 1 channel every 15 (900 second interval time) minutes. The thermal EMF generated in each channel will be visible as deflec
21、tion from the baseline on the recording. The meximum deflection should be no more than f IfiV from the baseline for any channel. ANALOG OUTPUT Figure 3. Test Set Up for Thermal Offset Test OTHER CHANNELS Figure 4. Shorting HI and LO of all Channels on the Card 3.3.2 Contact Resistance Test 1. Set up
22、-Connect a short II” or less) piece of copper wire (#18 AWG) to the input and also the output of the pole (signal HI or LO) or the channel to be tested (see Figure 5 for the test set up diagraml. 2. Zero the Model 195 with the Model 1641 lesds shorted together. 3. After the Model 195 is zeroed conne
23、ct the leads from the Model 195 to the barrier strips on the Model 7059 vie the short piece of copper wire on the terminal strips. Arrange the leads such that the plug-in card can be in- serted into the Model 705 mainframe without disturbing the test lead con- nections to the terminal strips. 6 4. I
24、nsert the Model 7059 into the mainframe, apply power end select the channel which is tc be tested. The total signal path resistance can now be measured. The reading should be 0.5fl upon initial shipment from the factory end 213 after usage. Figure 5. Test Set Up For Contact Resistance Test 3.3.3 Iso
25、lation Test Channel Isolation A. This test rneesures the leakage resistance between two channels on the board. One channel is tc be open end the other closed. Set up the test circuit shown in Figure 6. 6. Short the HI and LO connections of each channel on the Model 7059. C. Set the Model 705 tc the
26、Channel mode, Channel 1 and the Step mode. Set the electrometer tc Amps end prcgrem the Model 230 tc cutput IOOV. Take the electrometer cut of ZERO CHECK. Program Channel 1 es open and the other channels es closed. D. Take the reading on the electrometer. The reading should be less than 1 x 10.loA.
27、Using Ohms Law calculate the channel isolation. For exam- ple: R = E/I = lOOVl1 x 10.t0A = 1 x 10120. Due tc the capacitance of the circuit, the offset current may be high until the capacitance of the cir- cuit is charged up. Wait until the readings settle cut. E. Manually scan through Channel 1 thr
28、ough 10 repeating step C and D for each channel. input Isolation, Differential (Guarded) A. This test measures the differential input isolation which is the leakage resistance between a guarded channels HI end LO connections. Set up the test circuit shown in Figure 7. 6. Set the Model 705 tc the Cha
29、nnel mode, Channel 1 end the Step mode. Set the electrometer tc Amps end prcgram the Model 230 tc output 1OOV. Take the electrohidter cut of ZERO CHECK. C. Take the reading on the Blectrometer. The reading should be less then 1 x IOJA. Using Ohm% Law celculate the isolation (leakage resistance). For
30、 example: R = E/l = lOOV/lrSA = 1 x IO%. Due tc the capacitance of the circuit, the offset current may be high until the capacitance is charged up. Wait until the readings settle cut. D. Manually scan Channels 1 through 10 repeating step 6 end C for each channel. 7 Input Isolation, Common Mode A. Th
31、is test measures the leakage resistance between signal lines and power line ground. Set up the test circuit shown in Figure 8. El Short the input HI end LO terminals of each channel with a short piece of solid copper wire. Do not connect the channels together, just short the HI and LO terminals. C.
32、Insert the Model 7059 into the mainframe and set the Model 705 to the Channel mode, Channel 1 and the Step mode. D. Set the electrometer to Amps and program the Model 230 to output 100VDC. Take the electrometer out of ZERO CHECK. E. Take the reading on the electrometer. The reading should be less th
33、an 1 x lo-7A. Using Ohms Law calculate the isolation (leakage resistance). For example: R=E/I = lOOVl1 x IO-7A = 1 x10X2. Due to the capacitance of the circuit, the offset current may be high until the capacitance is charged up. Wait until the readings settle out. F. Manually scan Channels 1 through
34、 10 repeating step D and E for each channel. ELECTRO- “I METER MY OR 619, SET TO AMP6 LO Figure 6. Channel Isolation Test Set Up a MODEL 70517059 Figure 7. GUARD Differential Isolation Test Set UP MODEL 705/7059 CHANNEL UNDER TEST Figure Lt. Common Mode Isolation Test Set Up 9 SECTION 4 REPLACEABLE
35、PARTS 4.1 INTRODUCTION This section contains replacement parts information, e schematic diagram and component layout for the Model 7059. 4.2 REPLACEABLE PARTS Parts ere listed alpha-numerically in order of their circuit designation. Table 2 contains parts list information for the Model 7059. 4.3 ORD
36、ERING INFORMATION To place en order, or to obtain information concerning replacement parts, contact your Keithley representative or the factory. See the inside front cover for addresses. When ordering include the following information: 1. Instrument Model Number 2. Instrument Serial Number 3. Part D
37、escription 4. Circuit Description (if applicable) 5. Keihtley Part Number 4.4 FACTORY SERVICE If the instument is to be returned for service, please complete the service form which follows this section and return it with the instrument. 4.6 COMPONENT LAYOUT AND SCHEMATIC DIAGRAM Figure 9 contains e
38、component layout of the Model 7059 while, Figure 10 contains the Model 7059 schematic diagram. 11 Table 2. Model 7059 Replaceable Parts JlOOl 3 pin Terminal Strip (2 required) CS-457-2 JlOOZ IO pin Terminal Strip (3 required) cs-457-l J1003 3 pin Terminal Strip cs-475-l J1004 10 pin Terminal Strip 0
39、5-457-2 J1005 10 pin Terminal Strip CS-457-2 KlOl Relay RL-77 K102 Relay RL-77 K103 Relay RL-77 K104 Relay RL-77 K105 Relay RL-77 K106 Relay RL-77 K107 Relay RL-77 K106 Relay RL-77 K109 Relay RL-77 KllO Relay RL-77 Capacitor, 1OuF. 25V, Aluminum Electrolytic MECHANICAL PARTS Clamp, Assembly, Upper a
40、. Clamp, Upper b. Strip, Rubber Clamp, Assembly, Lower a. Clamp, Cable, Lower b. Strip, Rubber No. 6-32 x 5/16 Phillips Pan Head Screw (2 required) No. 6-32 x 1 Phillips Pan Head Screw (2 required) Keithley Part No. c-314-10 7055-303-03 7055.305 26621 7055.306 7055.307 26621 12 k d: Figure 9. Model 7059 Component Location Drawing 13114 Figure 10. Model 7069 Schematic Diagram 15116