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1、RadioFans.CN 收音机爱 好者资料库 w z o I r RadioFans.CN 收音机爱 好者资料库 RP-I Setup and Test Procedures To access the RP-I setup and test menus, enter the UTILITY mode and scroll left or right until the software version number is displayed. Press the.parameter down button, twice to enter the test menu. Scroll righ
2、t to access the compressor gain trim, distortion gain trim, and A/D calibration programs. The procedures for these setup routines are detailed below. Further scrolling will show the EQ test, speaker simulator test, compression test, distortion test, noise gate test, HISC test, RAM test, and display
3、tests. When done, return to the main utility menu. i.Compressor gain trim: With a 1 Vp-p, 1KHz sine wave measured at test pointoone (TPI) on the main PCB, adjust P6 (50K trimpot) until the signal measured at TP4 is the sme amplitude as the signal at TPI. 2.Distortion gain trim: Adjust P7 (50k trimpo
4、t) until the voltage measured at pin 7 of U97 is between -3mV DC and +3mV DC. 3.A/D Calibration a) Gain: With a 14 Vp-p, IKHz sine wave measured at TP2, adjust P2 (10K trimpot) until the signal measured at TP3 is 14 Vp-p. b) Bias: Reduce the signa! level 50 dB t 44.3 mVp-p and adjust P3 (50K trimpot
5、) until the signal seen at TP3 is just barely all positive going or all negative going. RadioFans.CN 收音机爱 好者资料库 oo Z:r o u (? um ,.; m o i I m ? od w 0 1 DATAIg- DATAIS- DATAIT- DATAI6- DATAI- DATEI- DATAI3- DATAI- DATAll - VDD - DATAIO- DATA9 - DATA8 - DATA7 - DATA6 - DATA - DTA - DATA - DATA - DAT
6、A1 - o - - ommmmmmmmmmmmmmmm VDD LSREG D SHR SHL DVRFLD GATE TEST CLK RQUD 3R ENEX MCA7 MCA6 MCA5 MCA4 HCA3 MCA FUNCTIONAL PIN DESCRIPTION FOR HISC Description VSS: ground (GND) CLK: oscillator input TEST: in-house test only (GND) GATE: in-house test only (GND) OVRFLO: indicates internal math overfl
7、ow SHL: sample/hold left SHR: sample/hold right D: DAC compare input LSREG: clocks lower byte DAC output MSREG: clocks upper byte DAC output VDD: +5V power DAC7.DAC0: DAC output data PJIMADR7.RAMADR0: DRAM address output RAS: DRAM row address strobe DWR: DRAM write AS: DRAM columm address strobe DAT
8、AI9.DATA0: DR data MCODE0.MCODEI5: microcode data MCA0.MCA7: microcode address ENEX : SWR- RQUD : 12K enable external microcode write external microcode write line request for microcode update in-house test only (+5V) Pin 1,20,32,43,54 2 3 4 5 6 7 8 9 i0 II 12 18 21 27 29 30 31 33,34,35,36,37,38, 39,40,41,44,45,46, 47,48,49,50,51,52, 53,55 56,57,58,59,60,61, 62,63,64,65,66,67, 68,69,70,71 72,73,75,76,77,78, 79,80 81 82 83 84 ,42,74 ,13,14,15,16,17 ,19 ,22,23,24,25,26 ,28