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1、1 Operators it is protected from R.F. contamination by R48/C41 and R53/C44, and from over-voltage by diode bridge D13-16. IC5 is a differential amplifier whose common mode rejection is factory set by VR3 to maximum at 100Hz, typically 85dB. The insert return is fed via C47 to SW6 (INSERT) and from h
2、ere to the EQ in/out switch SW7. After returning from the equaliser section, a signal is fed to the meter via ST3, the SOLO switch SW8 via buffer IC6b and the VCA section via either Jumper ST4/pre or IC19a. VCA and Mute The mute control is detailed later. Two mutes are associated with the vca stage,
3、 pre-fade and post-fade. These can be selected as required by jumpers in ST4 and ST5. The options are shown on diagram XL301_LK.DGM. The vca is based around IC6a, IC7 and IC8a in the audio path and IC8b in the control path. The control voltage from either the internal module level control RV3 (if fi
4、tted) and the fader tray level control are summed with an offset voltage by IC8b. This offset voltage adjusted by VR6 is used to define the available vca control range. It has been preset in the factory and should not require adjusting unless the vca has been replaced. The output voltage of IC8b, an
5、d therefore the control range of the vca, is further clamped by D58 and D59 to prevent overshoot. The VCA output is routed either pre or post mute (dependent upon ST5) to the pan control RV14a/RV14b which offers 3dB of attenuation at pan centre Diagram XL301_4.DGM. The pan control is buffered by IC1
6、6a and IC16b and then fed to the left and right master busses via the fet switches Q27-30 activated by SW5 (MASTER ON) Diagram. XL301_M.DGM. The outputs from IC16a and IC16b are also fed to the SOLO switch SW8 for routing to the solo busses. The feeds for the mixes are derived from the VCA input (Pi
7、n 1 of IC6) and the muted vca output. These are buffered by IC17a IC3c has 30dB of gain, which enables D1-D10 to turn on 30dB ahead of D11-D20. Transistor Q1 provides a regulated power source for the LM3915s and transistors Q2 and Q3 are constant current sources for the LED chains. To calibrate the
8、meter, a signal of -30dB is applied at pin 1 of ST1 the level can be externally verified at whichever output is driving the meter, selected by the meter change-over switch S34, and the cathode of D23 is monitored by an oscilloscope. When a symmetrical trace is obtained by adjusting VR1, the level is
9、 increased to 0dB and VR2 is adjusted so that D13 the 0dB yellow LED just illuminates. Then the signal is reduced to -30dB, when the LED chain should have only the first three LEDs D1-D3 illuminated. If the calibration appears to be wrong, the symmetry should be rechecked. Solo Routing Diagram XL310
10、_A3.DGM (both groups). Each of the four pfl switches, two per group (mix PFL and direct in PFL), provide a gate signal to select the appropriate fet switches for the source. These four gate signals are summed by diodes D51 to D54 and are used to turn on fet Q14 routing the pfl signal to the pfl buss
11、 via connector B pin 10. They are also used to route the left and right solo buss feeds from IC15 via fets Q10 and Q13 to connector B pins 11 (left) and 12 (right). In addition to this the signal is inverted by transistor Q15 in order to drive transistor Q16. Q16 is used to activate the Solo_Gate li
12、ne via connector B pin 13. In the case of channel A, the two group solo?s are switched by Q8 and Q9 into the summing input of IC15a via R111 and R112 to give unity gain. Likewise for channel B with Q11 this transposes the signals from the solo and master summing stages. IC4 is the balancing network
13、for the insert send which appears at connector A (STA) pins 19 hot and 20 cold, it is protected from excess voltage by the diode bridge D1-4, and set for maximum common mode rejection at 100Hz by VR1 typically 85dB. The insert return appears at connector A pins 21 hot and 22 cold; it is protected fr
14、om R.F. contamination by R21/C18 and R26/C21, and from over-voltage by diode bridge D5-8. IC5 is a differential amplifier whose common mode rejection is factory set by VR2 to maximum at 100Hz, typically 85dB. Block b of the insert switch S2 selects pre-insert signal from RLY1 or post-insert signal f
15、rom C24 and feeds it to block b of the master output PFL switch S3 change to diagram XL320_3.DGM, and via JP?A? to the master output fader RV1. The non-inverting buffer IC12a feeds both the meter via the meter changeover switch S8 and the mute switch S4. The inverting input of IC12a is fed via conne
16、ctor B pin 12s solder side only with talk signals from the communications module. The mute switch S4 wiper feeds the output stage IC6, which is protected from excess voltage by the diode bridge D9-12, and set for maximum common mode rejection at 100Hz by VR3 typically 85dB. Matrix Output Diagram XL3
17、20_2.DGM. Matrix signals arrive via connector B pins 10 and 11 signal and 7 ground at the virtual earth summing stage IC7b, and are reinverted by IC7a. IC8 is the balancing network for the insert send which appears at connector A pins 6 hot and 7 cold, it is protected from excess voltage by the diod
18、e bridge D13-16, and set for maximum common mode rejection at 100Hz by VR4 typically 85dB. The insert return appears at connector A pins 8 hot and 9 cold; it is protected from R.F. contamination by R50/C47 and R55/C50, and from over-voltage by diode bridge D17-20. IC9 is a differential amplifier who
19、se common mode rejection is factory set by VR5 to maximum at 100Hz, typically 85dB. Block b of the insert switch S5 selects pre-insert signal from C37 or post-insert signal from C53 and feeds it to block b of the matrix output PFL switch S6 15 Diagram XL320_3.DGM, and via JP?C? to the matrix output
20、fader RV2. The non-inverting buffer IC13a feeds both the meter via the meter changeover switch S8 and the mute switch S7. The inverting input of IC13a is fed via connector B pin 12 component side only with talk signals from the communications module. The mute switch S7 wiper feeds the output stage I
21、C10, which is protected from excess voltage by the diode bridge D21-24, and set for maximum common mode rejection at 100Hz by VR6 typically 85dB. Record Output Diagram XL320_2.DGM. The record outputs share one level control and one level check switch which overrides whichever input has been selected
22、 by the meter changeover switch S8 on diagram XL320_3.DGM. The controls are linked by the ribbon connector between ST2a on the lower (left) PBC and ST2b on the upper (right) PCB, but in all other respects each output is entirely separate. Signal is derived from the wiper of the master mute switch S4
23、 diagram XL320_3.DGM and fed to the top of the level control RV3a (left) or b (right), from the wiper of which it passes through a non-inverting buffer IC14b. From here the signal is fed both to the check level switch S9a or b via C66, and to the output stage IC11a, which is protected from excess vo
24、ltage by the diode bridge D25-28, and set for maximum common mode rejection at 100Hz by VR7 typically 85dB. Output Meter Diagram XL20M.DGM. IC3a and b receive, rectify, and calibrate the signal fed from the master module via connector ST1. The signal, now a varying positive voltage, is fed to IC3c a
25、nd d; IC3c has 30dB of gain, which enables D1-D10 to turn on 30dB ahead of D11-D20. Transistor Q1 provides a regulated power source for the LM3915s and transistors Q2 and Q3 are constant current sources for the LED chains. To calibrate the meter, a signal of -30dB is applied at pin 1 of ST1 and the
26、cathode of D23 is monitored by an oscilloscope. When a symmetrical trace is obtained by adjusting VR1, the level is increased to 0dB and VR2 is adjusted so that D13 the 0dB yellow LED just illuminates. Then the signal is reduced to -30dB, when the LED chain should have only the first three LEDs D1-D
27、3 illuminated. If the calibration appears to be wrong, the symmetry should be rechecked. LED Powering All diagrams. The status LEDs are powered by a constant current source based round Q2 Diagram XL320_1.DGM. The order for the chain starting from Q2 is meter changeover, matrix insert, master insert,
28、 matrix PFL, master PFL, matrix mute, and master mute. The chain finishes at the negative rail. 16 COMMUNICATIONS MODULE Centred in this module are the controls for the intercom, talk and pink noise generator functions, the automute system, and the signal monitoring facilities, as well as the headph
29、one amplifier. Intercom Diagram XL330_1.DGM. The intercom shares much of its circuitry with the monitoring and talkback facilities; the intercom switch S3 selects the routing and function of the microphone amplifier and headphone signal. In intercom mode, microphone signals arrive through either the
30、 headset or microphone connectors both mounted on the module?s front panel, pass through the a.g.c. amplifier IC5 and IC6a and to the remote station via the isolating transformer T1 via block d of the intercom switch S3. VR3 adjusts the amount of microphone signal fed to the headphones by varying th
31、e common mode rejection ratio of the microphone input to IC6b without varying the gain structure for signals arriving from the remote station via T1. Overall intercom level is adjusted by RV3 before it passes through blocks a and e of the intercom switch, the headphone level controls RV1 and the hea
32、dphone mute switch to the headphone amplifier see diagram XL330_5.DGM and the headphone jack socket on the module front panel. IC7 and IC8 are isolating networks which ensure that ground loops are avoided when the intercom is used with an actively powered station. When the intercom is switched on, a
33、 negative voltage is applied via block f of the intercom switch S3 to the anode of the LED in IC7, causing a positive voltage to be applied to pin 14 of connector A (ST1) via D18 and R52; when a call is received, the positive voltage on pin 14 energises the photo-transistor within IC8 and turns on Q
34、1, which illuminates the intercom call light LP1. In the event that the console is to be used as the slave station, the intercom can be decoupled completely from the console?s power supply by applying the master station?s power rail via the unused pin on the intercom XLR connector and edge connector
35、 A pin 15 to RLY1, which disconnects the intercom ground completely from the console. Talk Facility Diagram XL330_1.DGM. Microphone and headset signals arrive at block d of the intercom switch S3 as previously described for the intercom: however, with the switch in its normal non-intercom position,
36、talk signals pass through block c to block b of the pink noise generator switch S6 change to diagram XL330_2.DGM. From the wiper of this switch the signal passes both via buffer IC10b to connector A pin 12 and thus to the talk external XLR connector on the console back panel and to the talk master s
37、witch S13. When this switch is on, signal is fed to the three talk level pots RV4-6; a further 10dB of gain is provided by IC10a, IC12a, or IC12b before the individual talk switches S7-S12 enable signals to pass to their respective busses. The LED indicators for these switches are wired in parallel
38、between +VA and ground via limiting resistors R58-R63, with +VA appearing on each wiper of the LED switching blocks; all the normally open contacts are joined and fed to the second block of the talk master switch S13. This means that whenever a talk route is open i.e. the talk master switch and any
39、individual talk switch both on a gate voltage is fed from the talk master switch to Q2 and Q3, which dims the local outputs to avoid the feedback which would otherwise result if the talkback microphone and a loudspeaker driven from a local output are close together. 17 Pink Noise Generator Diagram X
40、L330_3.DGM. IC9 is the noise source; R92/C62, R93/C63, and R94/C64 provide the necessary colouration and IC11a corrects the gain structure and provides a buffer stage before the pink noise is fed to its switch S6 Diagram XL330_2.DGM, from which point it follows the same path as the talk signals. Aut
41、omute Master Controls Diagram XL330_3.DGM. The eight illuminated MUTE GROUP switches S14-21 feed positive rail voltage current-limited by R111 and decoupled by C69-768 and R103-110 to DC buffers IC13 to IC16. The outputs of these feed the automute busses on connector B (ST2) pins 15-22. Signal Monit
42、oring Diagram XL330_1.DGM. PFL signals arrive at connector B pin 1 where they are summed by the virtual earth stage IC1b and reinverted by IC1a. The solo listen switch S2 blocks c and d select either PFL signals from C3 or solo signals from the master module via connector B pins 13 and 14 and feed t
43、hem through the intercom switch S3 blocks a and e to the headphone level control RV1 and headphone mute switch S4, and thus to the headphone amplifier see diagram XL330_5.DGM. In addition to driving the headphone level control, the wipers of S3 blocks a and e feed the local output level control RV2
44、change to diagram XL330_2.DGM: signals pass through the local output mute switch S5 and buffers IC2a and b to the balanced local output stages IC3 and IC4, which are protected from excess voltage by the diode bridges D6-9 and 10-13, and set for maximum common mode rejection at 100Hz by VR1 and VR2 t
45、ypically 85dB. Headphone Amplifier Diagram XL330_5.DGM. R19/C17 and R20/C18 are the power supply decoupling networks; RF protection is afforded by R2/C1 and R4/C2. Connections to the module are hard-wired. Signal Metering Diagram XL330_1.DGM. The two meters are controlled by changeover switch S1. In
46、 solo mode switch on, blocks c and d are fed with solo left and right signals respectively from connector B pins 13 and 14 and pass them to the meters via ST3 and ST4. In PFL mode switch S1 off, block c is fed with PFL signals from C3 and passes them to the left meter via ST3; block d is fed with le
47、ft local output post-fader signals from the junction of R17 and C6 diagram XL330_2.DGM and passes them to the right meter via ST4. LED Powering All diagrams. The status LEDs with the exception of all the talk switches are powered by a constant current source based round Q4 Diagram XL330_3.DGM. The o
48、rder for the chain starting from Q4 is meter changeover, intercom, pink noise, mute group masters 1-8, solo listen, local output mute, and headphone mute. The chain finishes at the negative rail. 18 VCA CONTROL The internal mixes vca control voltages are derived either on the individual modules or m
49、ore commonly from the fader tray circuitry. Grand Master VCA Control Diagram XL321.DGM. DC power for the fader tray pcb?s are linked to the Grand Master 2 board via connector ST4. From here it is distributed to all other master and channel control cards via the VCA Control Buss ribbon cable linked to ST1. A stable vca reference voltage is also derived on this board from D2 via IC2b. It is adjusted with VR2 to give the required control range and distributed via the VCA Control Buss. This reference voltage is buffered and inverted by IC1a and fed to the Grand Master fader RV1. Depend