JVC-THA10-ddts-sm 电路图 维修手册.pdf

《JVC-THA10-ddts-sm 电路图 维修手册.pdf》由会员分享，可在线阅读，更多相关《JVC-THA10-ddts-sm 电路图 维修手册.pdf（53页珍藏版）》请在收音机爱好者资料库上搜索。

1、SERVICE MANUAL No.20890 JAN. 2001 COPYRIGHT 2001 VICTOR COMPANY OF JAPAN, LTD. Printed in Japan 200101(S) No.20890 DVD DIGITAL THEATER SYSTEM TH-A10TH-A10 TH-A10 (DVD player)/XV-TH-A10 SP-THA10 (Speaker section) SP-PWA10 (Powered subwoofer) SP-XCA10 (Center speaker) SP-XSA10 (Satellite speaker) x 4

2、Contents Safety precautions Preventing static electricity Dismantling and assembling the traverse unit Disassembly method Disassembly method Main adjustment Precautions for service Description of major ICs 1-2 1-3 1-4 1-5 1-17 1-21 1-24 1-25 Area Suffix TH-A10 3U 4U Maiaysia, Thailand, Philippines B

3、razil, Mexico, Peru TH-A10 SP-PWA10 SP-XSA10SP-XSA10SP-XCA10 XV-THA10 VICTOR COMPANY OF JAPAN, LIMITED AUDIO Region cord. 3) Press Enter button. And EEPROM initialize start. 4) When indicate 96kHz EEPROM on the display , initialize finished. Note : During the EEPROM initialization the keys may not b

4、e operated. Press the POWER key to initiate the STAND-BY mode and the test mode will then be cancelled. Adjustment and confirmation matter 1.The oscilloscope is connected between P1 and GND. 2.Reproduction of the test disc (VT-501) made by JVC. 3.It is confirmed that RF LEVEL is 350mVp-p 150mVp-p. 4

5、.When there is disorder in the waveform road cuts etc, test disk is exchanged and measured. 1. The CD jitter meter is connected between GND and P12. The RF level is observed at the same time. 2.The first test disk(CTS-1000) made of JVC is reproduced. 3.It is confirmed that RF LEVEL is 360 100mVp-p.

6、5. When there is disorder in the waveform road cuts etc, test disk is exchanged and measured. FRONT SIDE P12 and GND P1 and GND Main adjustment DVD SERVO CONTROL PWB TH-A10 1-22 MeasurementAdjustment point Refer to Fig.2 Mode Reproduction part Disc Measurement machine No need Flap adjustment of the

7、Pick-up guide shaft adjusts Tangential adjustment machine screw A and Tilt adjustment machine screw B from the DVD Mechanism Assy bottom. 1. The part at the center on the DVD test disc is reproduced. 2.The flap adjustment screws is turned alternately and adjusted like clearly seeing the waveform of

8、CN1041 to the way. Note 1.The tangential adjustment is done finish and, then, tilt is adjusted. 2.The repeat the adjustment 2-3 times,for best result. 3.The final adjustment should be tilt adjustment. VT-501 DVD Mechanism Assy Stand Stand 200mm DVD player Fig.1 CN101 of DVD Servo Control PWB CN11 of

9、 Connection PWB Extension Cord connections Refer to Fig.1 Extension cord No. QUQ110-3740AM General tool : Hex-head wrench (1.27 mm) (4) Flap adjustment of the Pick-up guide shaft 1) Make sure that there is no disc on the tray. 2) Press both the PLAY and OPEN/CLOSE keys of the main unit to activate t

10、he primary power and ( ; Version3, ; Region cord) will be displayed on the FL indicator. Note: If the FL indicator display stops and remains at TEST 0, unplug the power cord from the outlet and after waiting at least 1 second, plug it in again. After the tray open/close procedure has completed, unpl

11、ug it again and then perform the initialization procedure again. 3) Press the OPEN/CLOSE key of the main unit to draw the tray out. *Place the test disk (VT-501) on the tray and then press the OPEN/CLOSE key. (Note: Pushing the tray to close it is not possible.) 4) Press the PLAY key of the main uni

12、t. 5) The JIT 0000 is displayed on the FL indicator. Set the FL indicator figure value to its minimum by adjusting the pickup guide shaft flap. * The test mode is cancelled when the power is turned off. TH-A10 1-23 Confirmation after adjustment. Confirm to reproduce video CD and CD after the DVD tes

13、t disc is adjusted and to find abnormality. (5) About keeping the disc As for the DVD test disc, plane accuracy is demanded.Please note the keeping place on the disc. 1. Please do not put the disc directly on the work desk etc. after uses . 2. To keep the planarity of the disc, politely handle ,and

14、please put in a special case and keep the disc vertically after uses . Please keep keeping the disc in a cool place where direct sunshine and the air-conditioning wind do not drive. 3. When the disc curves,an accurate adjustment cannot be done. Please exchange for a new test disc and adjust optics.

15、4. Other discs might not be able to be reproduced when adjusting on a curved disc. A AB Fig.2 Point of adjustment * Please execute the static electricity protection measures before starting the adjustment. * When the following parts are exchanged,optical adjustment Adjust the flap of the disc motor

16、is necessary. 1.The disc motor was exchanged. 2.The laser pick up was exchanged. 3.The traverse motor unit was exchanged. Note Additionally, please adjust the flap of the disc motor when the picture quality deterioration is seen .The basic adjustment though, is unnecessary for part exchange in the t

17、raverse. An optical adjustment in the laser pick up cannot be done. Please adjust the flap of the disc motor after exchanging the laser pick up. * When the traverse unit is exchanged, the adjustment is basically unnecessary. TH-A10 1-24 Precautions for Service Handling of Traverse Unit and Laser Pic

18、kup 1. Do not touch any peripheral element of the pickup or the actuator. 2. The traverse unit and the pickup are precision devices and therefore must not be subjected to strong shock. 3. Do not use a tester to examine the laser diode. (The diode can easily be destroyed by the internal power supply

19、of the tester.) 4. To replace the traverse unit, pull out the metal short pin for protection from charging. 5. When replacing the pickup, after mounting a new pickup, remove the solder on the short land which is provided at the center of the flexible wire to open the circuit. 6. Half-fixed resistors

20、 for laser power adjustment are adjusted in pairs at shipment to match the characteristics of the optical block. Do not change the setting of these half-fixed resistors for laser power adjustment. Destruction of Traverse Unit and Laser Pickup by Static Electricity Laser diodes are easily destroyed b

21、y static electricity charged on clothing or the human body. Before repairing peripheral elements of the traverse unit or pickup, be sure to take the following electrostatic protection: 1. Wear an antistatic wrist wrap. 2. With a conductive sheet or a steel plate on the workbench on which the travers

22、e unit or the pick up is to be repaired, ground the sheet or the plate. 3. After removing the flexible wire from the connector (CN101), short-circuit the flexible wire by the metal clip. 4. Short-circuit the laser diode by soldering the land which is provided at the center of the flexible wire for t

23、he pickup. After completing the repair, remove the solder to open the circuit. Short-circuit TH-A10 1-25 AINL ZEROL AINR ZEROR VCOM VREFL VREFR Voltage Reference Modulator Modulator Decimation Filter Decimation Filter Clock Divider Serial I/O Interface L/R SCLK SDT0 TST1 TST2 TST3 PDDIF0DIF1DIF2 VAA

24、GNDVDVBDGNDMCLK CMODE 12 11 10 9 8 7 6 5 4 3 2 1 Top View 22 24 23 21 20 19 18 17 16 15 14 13 DIF2 DIF1 DIF0 SDT0 L/R SCLK MCLK PD CMODE TST1 DGND VD AINR ZEROR AINL ZEROL VREFR VREFL VCOM AGND VA VB TST2 TST3 1. Terminal layout 2. Block diagram AK5330 (IC701) : A/D Converter Discription of major IC

25、s TH-A10 1-26 3. Pin function No. Pin Name I/O Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 AINR ZEROR AINL ZEROL VREFR VREFL VCOM AGND VA VB TST2 TST3 VD DGND TST1 CMODE PD MCLK SCLK L/R SDT0 DIF0 DIF1 DIF2 I I I I O O O - - - I/O I/O - - I I I I I I O I I I Rch Analog In

26、put Pin Rch Zero Input Pin Lch Analog Input Pin Lch Zero Input Pin Rch Vopltage Reference Output Pin. 2.5V Normally connected to AGND with a 0.1uF ceramic capacitor in parallel with an electrolytic capacitor less than 10uF. Lch Vopltage Reference Output Pin. 2.5V Normally connected to AGND with a 0.

27、1uF ceramic capacitor in parallel with an electrolytic capacitor less than 10uF. Voltage Common Output Pin. 2.5V Normally connected to AGND with a 0.1uF ceramic capacitor in parallel with an electrolytic capacitor less than 10uF. Analog Ground Pin Analog Supply Pin, +5V Substrate Voltage Supply Pin,

28、 +5V Test Pins (Pull-down pin) Must be left floating. Digital power Supply Pin, +5V Digital Ground Pin Test Pin (Pull-down pin) Must be left floating or connected to DGND. Master Clock Select Pin L : MCLK=256fs, H : MCLK=384fs Power-Down Pin When H, the circuit is in power-down mode,Upon returning t

29、o L, the AK5330 starts an offset calibration cycle.A calibration cycle should always be initiated after power-up. Master Clock Input Pin Serial Data Clock Pin Output data is clocked out on the falling edge of SCLK. Input data is clocked in on the rising edge of SCLK. SCLK requires a continuously sup

30、plied clock at any frequency from 32fs to 64fs. Left/Right Channel Select Pin The fs clock is input to this pin. H : Lch, L : Rch Serial Data Output Pin Data bits are presented MSB first, in 2s complement format. This pin is L in the power-down mode. Serial Interface Format Pin Correspond to 8 modes

31、. TH-A10 1-27 INSTRUCTION REGISTERINSTRUCTION DECODE, CONTROL AND CLOCK GENERATION ADD. BUFFERS DATA REGISTER 16 R/W AMPS AND AUTO ERASE 16 DECODER EEPROM 4096bit 256 x 16 VPP SW VREF VPP GENERATOR DO DI CS SK PE 1 2 3 4 PE VCC CS SK NC GND DO DI 8 7 6 5 8 PIN SOP Pin no. Symbol 1 PE 2 VCC 3 CS 4 SK

32、 5 DI 6 DO 7 GND 8 NC Function Program enable (With built-in pull-up resistor) Power supply Chip selection Cereal clock input Cereal data input Cereal data output Ground No connection NOTE : The pull-up resistor of the PE pin is about 2.5M (VCC=5V) AK93C65AF-X (IC590) : EEPROM 1.Pin layout 2.Block d

33、iagram 3.Pin function TH-A10 1-28 1.Pin layout 2.Block diagram AN8706FHQ (IC101) : Front end processor AN8706FHQ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 6

34、0 59 58 57 56 55 54 53 52 51 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 CBDOFS RBCA TESTSG RFINP RFINN VCC2 GND2 VREF2 COFTFS COFTSL RFON RFOP TS DCRF FS VIN6 VIN5 VCC1 VIN1 VIN2 VIN3 VIN4 VREF4 DIFP DIFN CBDOSL CSAG DCAGC AGCG PEAK BOTTOM RFENV FC BOOST OFTR BDO JIT

35、OUT GND3 FUPDN ITDLI VCOIN PLFLT PLFLT2 FCPO PCPO VCC3 CAPA DTRD IDGT VCC5 RDCKP RDCKN RDTP RDTN GND5 GND4 VCC4 DTMONN DTMONP DSLFLT DSLO FLTOUT DCFLT VREF3 VPWBDO VPWOFT IDDLY DBAL GND1 VREF1 TKCNT TKCFLT TEOUT TEI RSCL LDONB LDONA LPCOA LPC1 VHARF TGBAL POFLT PTH TBAL TG FGCTL FBAL FEOUT FEN VREFL

36、 VREFC VREFH PULIN SEN SCK STDI STNBY XTRON MTRON ROMRAM FE(SSD) FE BAL TE(DPD) TE BAL TG(DPD) LPC(Amp)VREF reg MU BDO Det RF ENV AGC EQ OFTR Det INTERFACE DSL PLL DFLTOP/NRFENV RFIN TGTETKCNTTBALFBALFE Head Amp. SSD Signal Head Amp. DPD Signal FC/Boost AGC Cont RFOUT FS/TS JITTER Det DSLOUT JITOUT

37、BDO OFTR CLK DATA SYNC TKCNT OPTICAL HEAD (650nm) TGBALCPUSTNBYMTRONSERVO PROCESSOR Head Amp. TH-A10 1-29 Pin No.SymbolI/OFunctions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 I I O I O I O I I O I I O I

38、 O O O I I I I I I I I O I O O O O O I I I I O O O O O O O I O O O O O O LDONB LDONA LPCOA LPC1 VHARF TGBAL POFLT PTH TBAL TG FGCTL FBAL FEOUT FEN VREFL VREFC VREFH PULIN SEN SCK STDI STNBY XTRON MTRON ROMRAM RSCL TEI TEOUT TKCFLT TKCNT VREF1 GND1 DBAL IDDLY VPWOFT VPWBDO VREF3 DCFLT FLTOUT DSLO DSL

39、FLT DTMONP DTMONN VCC4 GND4 GND5 RDTN RDTP RDCKN RDCKP Laser ON (CD Head) terminal Laser ON (DVD Head) terminal Laser drive output terminal Laser PIN input terminal VHALF voltage output terminal Tangential phase balance control terminal Track detection Threshold value level terminal Track detection

40、Threshold value level terminal Tracking balance control terminal Tangential phase error signal output terminal Focus amplifier Gain control terminal Focus balance control terminal Focus error signal output terminal Focus error output amplifier reversing input terminal VREFL voltage output terminal V

41、REFC voltage output terminal VREFH voltage output terminal DSL,PLL drawing mode switch terminal SEN(Cereal data input terminal) SCK(Cereal data input terminal) STDI(Cereal data input terminal) Standby mode control terminal Tracking OFF holding input terminal Monitor output ON/OFF switch terminal ROM

42、 . RAM switch terminal Standard current source terminal Tracking error output Amp reversing input terminal Tracking error signal output terminal Track count detection filter terminal Track count output terminal VREF1 voltage output terminal Earth terminal 1 Data slice offset adjustment terminal Data

43、 slice delay adjustment terminal OFTR detection level setting terminal BDO detection level setting terminal VREF3 voltage output terminal Capacity connection terminal for data slice input filter Filter amplifier output terminal Data slice single data output terminal Constant filter terminal when dat

44、a is sliceddelly PLL differential motion 2 making to value edge signal moniter output (+) PLL differential motion 2 making to value edge signal moniter output (-) Power terminal 4 (5V) Earth terminal 4 Earth terminal 5 PLL differential motion making to synchronization RF signal reversing output PLL

45、differential motion making to synchronization RF signal rotation output PLL differential motion making synchronization clock reversing output PLL differential motion making synchronization clock rotation output 3.Pin function AN8706FHQ (1/2) TH-A10 1-30 I/OPin No.SymbolFunctions 51 52 53 54 55 56 57

46、 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 I I I I I O O O O I O I O O O O I I O O O O O O O O O I I I I O O O O O O O O O I I I I I I I O O O VCC5 IDGT DTRD CAPA VCC3 PCPO FCPO PLFLT2 PLFLT VCOIN ITDLI FUPDN GND

47、3 JITOUT BDO OFTR BOOST FC RFENV BOTTOM PEAK AGCG DCAGC CSAG CBDOSL CBDOFS RBCA TESTSG RFINP RFINN VCC2 GND2 VREF2 COFTFS COFTFL RFON RFOP TS DCRF FS VIN6 VIN5 VCC1 VIN1 VIN2 VIN3 VIN4 VREF4 DIFP DIFN Power terminal 5 (3.3V) Data slice part address part gate signal input terminal (For RAM) Data slic

48、e data read signal input terminal(For RAM) Data slice CAPA(Address)signal input terminal (For RAM) Power terminal 3 (5V) PLL phase gain set terminal PLL frequency gain set terminal PLL low region filter terminal PLL high region filter terminal PLL VCO input terminal PLL jitter free current ripple re

49、moval filter terminal PLL frequency control input terminal Earth terminal 3 Detection signal output of jitter BDO output terminal OFTR output terminal Booth control terminal for filter FC control terminal for filter RF enve output terminal Bottom enve detection filter terminal Peak enve detection filter terminal