Yamaha-MG12-mix-sm 电路图 维修手册.pdf

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1、1 MG12/4FX SERVICE MANUAL PA 011768 200501-38850 Copyright (c) Yamaha Corporation. All rights reserved. PDF-K 05.02 HAMAMATSU, JAPAN CONTENTS SPECIFICATIONS. 3/5 DIMENSIONS. 7 PANEL LAYOUT. 8 CIRCUIT BOARD LAYOUT. 12 WIRING. 13 DISASSEMBLY PROCEDURE. 14 LSI PIN DESCRIPTION. 19 IC BLOCK DIAGRAM. 20 C

2、IRCUIT BOARDS. 22 INSPECTIONS. 30/35 PARTS LIST BLOCK DIAGRAM equivalent to a 20 kHz filter with infinite dB/octave attenuation. Hum R: cold; S: ground) XLR-3-31 type (balanced) Phone jack (unbalanced) Phone jack (unbalanced) Phone jack (unbalanced); RCA pin jack Phone jack (TRS) (unbalanced T: out;

3、 R: in; S: ground) RCA pin jack -16 -34 +10 -60 -16 -34 +10 Input Specifications Where 0 dBu = 0.775 V and 0 dBV= 1 V * Input sensitivity: the lowest level that will produce the nominal output level when the unit is set to maximum gain. Where 0 dBu = 0.775 V and 0 dBV= 1 V Output Specifications 10k

4、10k 10k 10k 10k 10k Input ConnectorGain Input Impedance Appropriate Impedance Sensitivity* Nominal Level Max. Before Clipping Connector Specifications MIC INPUT (CHs 1 to 4) LINE INPUT (CHs 1 to 4) ST CH MIC INPUT (CH5(L)/CH6(R), CH7(L)/CH8(R) ST CH LINE INPUT (CH5(L)/CH6(R), CH7(L)/CH8(R) ST CH INP

5、UT (CH9(L)/CH10(R), CH11(L)/CH12(R) CH INSERT IN (CHs 1 to 4) RETURN (L, R) 2TR IN (L, R) 50-600 600 line 50-600 mic 600 line 600 line 600 line 600 line 600 line -80 dBu (0.078 mV) -36 dBu (12.3 mV) -54 dBu (1.55 mV) -10 dBu (245 mV) -80 dBu (0.078 mV) -36 dBu (12.3 mV) -54 dBu (1.55 mV) -10 dBu (24

6、5 mV) -30 dBu (24.5 mV) -20 dBu (77.5 mV) -12 dBu (195 mV) -26 dBV (50.1 mV) -60 dBu (0.775 mV) -16 dBu (123 mV) -34 dBu (15.5 mV) +10 dBu (2.45 V) -60 dBu (0.775 mV) -16 dBu (123 mV) -34 dBu (15.5 mV) +10 dBu (2.45 V) -10 dBu (245 mV) 0 dBu (0.775 V) +4 dBu (1.23 V) -10 dBV (316 mV) -40 dBu (7.75 m

7、V) +4 dBu (1.23 V) -14 dBu (155 mV) +30 dBu (24.5 V) -40 dBu (7.75 mV) -10 dBu (245 mV) -14 dBu (155 mV) +30 dBu (24.5 V) +10 dBu (2.45 V) +20 dBu (7.75 V) +24 dBu (12.3 V) +10 dBV (3.16 V) Output ConnectorsOutput Impedance Appropriate Impedance Nominal Level Max. Before Clipping Connector Specifica

8、tions ST OUT (L, R)150 +24 dBu (12.3 V) XLR-3-32 type (balanced) Phone jack (TRS) (balanced T: hot; R: cold; S: ground) 600 line+4 dBu (1.23 V) GROUP OUT (1-2) AUX SEND EFFECT SEND 150 +20 dBu (7.75 V) Phone jack (TRS) (impedance balanced T: hot; R: cold; S: ground) 10 k line+4 dBu (1.23 V) CH INSER

9、T OUT (CHs 1 to 4) 150 +20 dBu (7.75 V) Phone jack (TRS) (unbalanced T: out; R: in; S: ground) 10 k line0 dBu (0.775 V) REC OUT (L, R)600 +10 dBV (3.16 V)RCA pin jack10 k line-10 dBV (316 mV) C-R OUT (L, R)150 +20 dBu (7.75 V) Phone jack (TRS) (impedance balanced T: hot; R: cold; S: ground) 10 k lin

10、e+4 dBu (1.23 V) PHONES 100 75 mWStereo phone jack40 phone3 mW 5 MG12/4FX 総合仕様 電気的特性 一般仕様 条件最小標準最大単位 0.1 可変幅 付属品電源(PA-20) (FC5) 消費電力36W 質量5kg 全高調波歪率(MIC ST OUT) 周波数特性(MIC ST OUT) MEI12MEI 36 WC703300(7) CN102CNF01 WC712200 WC711900 CN571 - CN501 CN771 - CN701 CN971 - CN901 CNA71 - CNA01 CND71 - CND0

11、1 CNE71 - CNE01 CNG71 - CNG01 WD350100 WC712200 CN03 CN02 WC711900 CN01 3.Jumper wires are bend as shown in figure. 図様曲。 5.Wires binding with WIRE HARNESS TIE. 束線結束。 6.After attaching PS to side panel.(bottom view) PS取付後(見図) 4.Connect WD350100,WC712200 & WC711900 with PS circuit board. WD350100WC712

12、200WC711900PS接続。 V3172800 WIRING（結線図） MG12/4FX 14 DISASSEMBLY PROCEDURE 420:Bind Head Screw 4.0X8 MFZN2BL (EG340360) 1.（所要時間：各約1 分） 1-14202本外、 L外 。 （写真1） 1-2440 2 本外、 R 外 。 （写真2） 2.（所要時間：約2 分） 2-1390A8本4002本外、 外。 （写真3） 390: Bind Head Tapping Screw-S3.0X6 MFZN2BL (EP630210) 400: Bind Head Tapping Scr

13、ew-B3.0X8 MFZN2BL (EP600190) Photo.3 (写真3) 1.Rack Mount Angle (Time required: About 1 minute each) 1-1Remove the two (2) screws marked 420. Then, remove the Rack Mount Angle L. (Photo.1) 1-2Remove the two (2) screws marked 440. Then, remove the Rack Mount Angle R. (Photo.2) 2.Bottom Cover (Time requ

14、ired: About 2 minutes) 2-1Remove the eight (8) screws marked 390A and the two (2) screws marked 400. Then, remove the bottom cover. (Photo.3) Photo.1Photo.2 Rack Mount Angle R （R） 440 Rack Mount Angle L （L） 420 390A 390B390C 400 Bottom Cover （） 400 390A 440:Bind Head Screw 4.0X8 MFZN2BL (EG340360) 負

15、荷台置、 注 意作業。 Take care to avoid excess load to the bottom by putting the unit on a table or the like. （分解手順） （小）（小） (写真1)(写真2) （S） （B） 15 MG12/4FX 3.、PS （所要時間：各約6 分） 3-1外。 （2項参照） 3-2 L: 3-2-1 L 外。 （1 項参照） 3-2-2250A六角穴付 2 本、 260A 2 本、 2203本390B1本外、 L 外。 （写真3、4、5） 3-3 R、 PS: 3-3-1R 外。 （1 項参照） 3-3-2250B

16、六角穴付 2 本、 260B 2 本、 2203本390C1本外、 R（PS 付）外。 （写真3、6、7） 3-3-3360 2 本外、 R PS 外。 （図1） 3-3-4A3本、 B6本外、PS IC01-05, Q01 各端子半田外、PS 分離。 （図2） 250: Hex. Socket Set Screw 3.0X6 MFZN2BL (WD252600) 220: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) Photo.6 260: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP6302

17、10) Photo.5 260: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) Photo.7 3.Side Cover (Time required: About 6 minutes each) 3-1Remove the bottom cover. (See procedure 2.) 3-2Side Cover L: 3-2-1Remove the Rack Mount Angle L. (See procedure 1.) 3-2-2Remove the two (2) hex socket set screws marked 2

18、50A, two (2) screws marked 260A, three (3) screws marked 220 and screw marked 390B. The side cover L can then be removed. (Photos 3, 4, 5) 3-3Side Cover R, PS Circuit Board 3-3-1Remove the Rack Mount Angle R. (See procedure 1.) 3-3-2Remove the two (2) hex socket set screws marked 250B, two (2) screw

19、s marked 260B, three (3) screws marked 220 and screw marked 390C. The side cover R (with the PS circuit board) can then be removed. (Photos. 3, 6, 7) 3-3-3Remove the two (2) screws marked 360. The side cover R and the PS circuit board can then be removed. (Fig. 1) 3-3-4Remove the three (3) screws ma

20、rked A, six (6) screws marked B, and each soldered terminal of the IC01-05 and Q01 of the PS circuit board. The heat sink can then be removed from the PS circuit board. (Fig. 2) Photo.4 250A 220 Side Cover L（L） 260A 250B 220 Side Cover R（R） 260B 250: Hex. Socket Set Screw 3.0X6 MFZN2BL (WD252600) 22

21、0: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) （S） （S） （六角穴付S） (写真6) (写真7) (写真4) (写真5) （S） （S） （六角穴付S） MG12/4FX 16 Heat Sink B A A （） PS IC01 IC02 IC03 IC04 IC05 Q01 IC01 IC02 IC03 IC04 IC05 Q01 IC01 IC02 IC03 IC04 IC05 Q01 Fig.2 4.DSP、 DSP12 （所要時間：約7 分） 4-1外。 （2 項参照） 4-2R、 PS外。（3-3項参照） 4-332

22、6 2 本外、 DSP外。 （図3） 4-43204本外、DSP12 DSP外。 （写真9） 4-52902本3002本外、 DSP12外。 （写真9） 290 320300300 DSP MAIN(1/2) Shield DSP12 （DSP12） Photo.9 (写真9) Fig.3 300: Plastic Rivet NRP-345 (CB815740) 326: Bind Head Tapping Screw-S 2.6X4 MFZN2Y (VU757900) 320: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) 360 S

23、ide Cover R（R） Power Supply Unit（PS） Fig.1 360: Bind Head Tapping Screw-B 3.0X8 MFZN2BL (EP600190) 290: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) Cover DSP （DSP） 326 Shield DSP12 （DSP12） DSP MAIN1/2 4.DSP Circuit Board, Shield DSP 12 (Time required: About 7 minutes) 4-1Remove the bottom cov

24、er. (See procedure 2) 4-2Remove the side cover R and PS circuit board. (See procedure 3-3) 4-3Remove the two (2) screws marked 326. The cover DSP can then be removed. (Fig. 3) 4-4Remove the four (4) screws marked 320. The DSP circuit board can then be removed from the shield DSP12. (Photo. 9) 4-5Rem

25、ove the two (2) screws marked 290 and two (2) rivets marked 300. The shield DSP12 can then be removed. (Photo. 9) (図2) (図1) （B） （） （S） （S） (図3) （S） 17 MG12/4FX 6. JACK、MAIN（1/2、2/2） （所要時間：約13分） 6-1外。 （2項参照） 6-2、PS外。 （3-3項参照） 6-3270 18 本A六角平 各27個外。 （写真11） 6-4(FADER) 11個（PROGRAM）外 。 （写真12） 6-5200六角穴付

26、S 2 本外、 JACK、 MAIN（1/2、2/2）外。 （写真12） 6-6 JACK 6-6-1 7 箇所外、JACK 外。 （写真13） 6-7 MAIN（2/2） 6-7-1B六角外、MAIN（2/2）外 。 （図3） 6-8 MAIN（1/2） 6-8-1603本外、 MIX2外。 （写真14） 6-8-2C 16 個外。 （写真13） 6-8-3MAIN（1/2）固定12箇所 。 (基板穴同 向) （写真14） 6-8-4MIX12個、MAIN（1/2）分 離。 （写真13） Photo.10 5.電源SWAC（所要時間：約6分） 5-1外。 （2項参照） 5-2R、 PS外。（

27、3-3項参照） 5-3165 3 本外、束線 Ass y外。 （図4） 5-4電源SW 押、電源SW外。 （写真10） 5-5六角外AC外 。 （写真10） *AC、接続線材外 AC 分離。 Fig.4 165 165 165 Power Switch （電源SW） AC Connector （AC） Top Cover （） 165: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) Claw （） Claw （） Connector Assembly （束線Assy） Power Switch （電源SW） Support （AC） AC

28、 Connector （AC） Hexagonal nut & Washer （六角、） 5.Power Switch and AC Connector (Time required: About 6 minutes) 5-1Remove the bottom cover. (See procedure 2) 5-2Remove the side cover R and PS circuit board. (See procedure 3-3) 5-3Remove the three (3) screws marked 165. The connector assembly can then

29、be removed from the top cover. (Fig.4) 5-4Push the claws of the power switch to remove it. (Photo. 10) 5-5Remove the hexagonal nut and washer. The AC connector can then be removed. (Photo. 10) *The AC connector cannot be separated from the support AC without removing the solder on the parts. 6.JACK

30、Circuit Board, MAIN Circuit Board (1/2, 2/2) (Time required: About 13 minutes) 6-1Remove the bottom cover. (See procedure 2) 6-2Remove the side cover and PS circuit board. (See procedure 3-3) 6-3Remove the eighteen (18) screws marked 270, and 27 pieces each of hexagonal nuts marked A and plain washe

31、rs. (Photo.11) 6-4Remove the eleven (11) knobs (FADER) and knob (PROGRAM). (Photo. 12) 6-5Remove the two (2) hex socket set screws marked 200. The JACK circuit board and MAIN circuit board (1/2, 2/2) can then be removed. (Photos. 3, 4, 5) 6-6JACK Circuit Board 6-6-1Remove the seven (7) connectors. T

32、he JACK circuit board can then be removed. (Photo. 13) 6-7MAIN Circuit Board (2/2) 6-7-1Remove the hexagonal nut marked B. The MAIN circuit board (2/2)can then be removed. (Fig. 3) 6-8MAIN Circuit Board (1/2) 6-8-1Remove the three (3) screws marked 60. The support MIX2 can then be removed. (Photo. 1

33、4) 6-8-2Remove the sixteen (16) knobs marked C. (Photo. 13) 6-8-3Turn the twelve (12) hooks fixing the MAIN circuit board (1/2) to be aligned parallel to each other. (In the direction of openings in the circuit board) (Photo. 14) 6-8-4 The two (2) supports MIX1 and MAIN circuit board (1/2) can then

34、be removed. (Photos. 13) (写真10) (図4) （S） MG12/4FX 18 Connector（） JACK C C 40 Photo.14(写真14) Photo.13(写真13) 60 Support MIX2 （MIX2） Hooks（）MAIN1/2 270270270 270 AAA AA Knob(FADER) （） ） Knob(PROGRAM) （PROGRAM） ） 200 Photo.12(写真12) Photo.11(写真11) 270: Bonding Tapping Screw-B 3.0X10 MFZN2BL (VQ049800) （B

35、） 200: Hex.Socket Set Screw 3.0X6 MFZN2BL (WD252600) （六角穴付S） 60: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) （S） 40: Bind Head Tapping Screw-S 3.0X6 MFZN2BL (EP630210) （S） Fig.3(図3) Support MIX1 （MIX1） B MAIN(2/2) MAIN(1/2) 19 MG12/4FX LSI PIN DESCRIPTION（LSI 端子機能表） PinPin No.NAMEI/OFUNCTIONN

36、o.NAMEI/OFUNCTION 1VSS-VSS65VSS-VSS 2TESTNIInput for TEST66IOVDD-IOVDD +3.3V 3PLLBPNIPLL bypass select67LBN/LWRN/PF6OExternal memory lower-byte enable 4PLLVDD-PLLVDD +2.5V68UBN/UWRN/PF7OExternal memory upper-byte enable 5CIN-Capacitor terminal for PLL69RDN/PF4OExternal memory read enable 6PLLVSS-PLL

37、VSS70MD00I/O 7TRSTNI71MD08I/O 8TMSI72MD01I/O 9TCKI JTAG input 73MD09I/OExternal memory data bus 10TDII74MD02I/O 11TD0OJTAG output75MD10I/O 12XIICrystal oscillator76MD03I/O 13XOOCrystal oscillator 77VSS-VSS 14VSS-VSS78MD11I/O 15VDD-VDD +2.5V79MD04I/O 16ICNIHardware reset80MD12I/O 17ECSNICPU I/F chip

38、select81MD05I/O 18EWRN/PD5ICPU I/F write enable82MD13I/OExternal memory data bus 19ERDN/PD4ICPU I/F read enable83MD06I/O 20EA3/PD3I CPU I/F address bus 84MD14I/O 21EA2/PD2I85MD07I/O 22EA1/PD1I86MD15I/O 23EA0/PD0I87WRN/PF5OExternal memory write enable 24IOVDD-IOVDD +3.3V88VSS-VSS 25ED0/PC0I/O CPU I/F

39、 data bus 89VDD-VDD +2.5V 26ED1/PC1I/O90IOVDD-IOVDD +3.3V 27ED2/PC2I/O91MA17O 28ED3/PC3I/O92MA16O 29ED4/PC4I/O93MA15O 30ED5/PC5I/O94MA14O 31ED6/PC6I/O95MA13O 32ED7/PC7I/O96MA12O 33VSS-VSS97MA11OExternal memory address bus 34IRQ0N/PH0IInterrupt input98MA10O 35TxD0OSerial output99MA09O 36RxD0Iserial i

40、nput100MA08O 37TxD1/PG2OSerial output101MA07O 38RxD1/PH1Iserial input102MA06O 39SCLK1/PH2IExternal synchronization clock103MA05O 40SD0OSerial output104VSS-VSS 41SDI/PH3Iserial input105MA04O 42BCLKOBit clock output106MA03O External memory address bus 43WCLK/SY0OWord clock output107MA02O 44SYSCLK/PG3O

41、Clock output108MA01O 45VSS-VSS109CS0N/PG0OExternal memory chip select 46VDD-VDD +2.5V110MA18O 47IOVDD-IOVDD +3.3V111MA19O External memory address bus External memory address bus 48PA0I/O I/O port 112MA21/PF1O 49PA1I/O113MA22/PF2O 50PA2I/O114MA20O 51PA3I/O115MA23/PF3O 52PA4I/O116CS1N/PG1OExternal mem

42、ory chip select 53PA5I/O117MA00/PF0O 54PA6I/O118VSS-VSS 55PA7I/O119VDD-VDD +2.5V 56VSS-VSS120IOVDD-IOVDD +3.3V 57PB0I/O I/O port 121CS2N/PE0O 58PB1I/O122CS3N/PE1O 59PB2I/O123CS4N/CASN/PE2O 60PB3I/O124CS5N/PE3O 61PB4I/O125CS50RDN/PE4O External memory chip select 62PB5I/O126CS51WRN/PE5O 63PB6I/O127CS5

43、2WRN/PE6O 64PB7/SYII/O128CS53WRN/RASN/PE7O YMW767-V (X3271A00) CPU DSP: ICM07 MG12/4FX 20 IC BLOCK DIAGRAM（IC図） (X5219A00) AK5381VT-E2 DSP: ICM04 A/D Converter PCM1742KEG/2K (X3538A00) DSP: ICM08 Digital to Analog Converter 1 2 3 4 5 6 7 16 15 14 13 12 11 SCK ML MC MD ZEROL/NA ZEROR/ZEROA VCOM 8 9 1

44、0 AGND BCK DATA LRCK DGND VDD VCC VOUTL VOUTR Pin No.Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 I/O I I I - - - O O - - O O I I I I BCK DATA LRCK DGND VDD VCC VOUTL VOUTR AGND VCOM ZEROR/ZEROA ZEROL/NA MD MC ML SCK Function Audio Data Bit Clock Input (1) Audio Data Digital Input (1) L-Channel a

45、nd R-Channel Audio Data Latch Enable Input (1) Digital Ground Digital Power Supply, +3.3V Analog Power Supply, +5V Analog Output for L-Channel Analog Output for R-Channel Analog Ground Common Voltage Decoupling Zero Flag Output for R-Channel/Zero Flag Output for L/R-Channel Zero Flag Output for L-Ch

46、annel/No Assign Mode Control Data Input (2) Mode Control Clock Input (2) Mode Control Latch Input (2) System Clock Input Notes: (1) Schmitt-trigger input, 5V tolerant. (2) Schmitt-trigger with internal pull-down, 5V tolerant. Audio Serial Port Output Amp and Low-Pass Filter DAC 4x/8x Oversampling Di

47、gital Filter with Function Controller Enhanced Multilevel Delta-Sigma Modulator Output Amp and Low-Pass Filter DAC BCK LRCK DATA ML MC MD Serial Control Port System Clock Manager Zero Detect Power Supply VOUTL VCOM VOUTR VDD DGND ZEROL ZEROR SCK System Clock VCC AGND 5 1 2 3 46 7 8 9 10 1112 13 14 1

48、5 16 1 2 3 4 5 6 7 16 15 14 13 12 11 CKS0 CKS2 DIF PDN SCLK MCLK LRCK 8 9 10 SDTO AINR AINL CKS1 VCOM AGND VA VD DGND Pin No.Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 I/O I I I O - - - - O I/O I I/O I I I I AINR AINL CKS1 VCOM AGND VA VD DGND SDTO LRCK MCLK SCLK PDN DIF CKS2 CKS0 Function Rch Analog Input Pin Lch Analog input Pin Mode Select 1 Pin Common Voltage Output Pin, VA/2 Bias voltage of ADC input. Analog Ground Pin Ana