Arcam-AVR600-avr-sm维修电路原理图.pdf

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1、UA AVR600 Service manual issue 1.2 ARCAM RadioFans.CN 收音机爱 好者资料库 This PCB provides the power for the unit through CON203: +5V_STBY 5V standby supply L118 RS232, L126 display (on in standby) +3V3 PW338 L122 PW338 supply (on in standby) 1V8D L122 PW338 supply (on in standby) +5V_1 general 5V supply +6

2、V_1 L156 DSP, L126 Display Vcc and Vee are approximately +/- 59V off load and +Vlo and Vlo are approximately +/- 30V off load. The rectified and smoothed power rails are fed to the lower power amp PCB L129, along with an AC power feed for checking the mains is present, via CON100. CON103 is used to

3、bring in the C, LS and RS line level input signals from the rest of the AVR via L129. It also imports +/-12V supplies for the front stage op-amps and +5V for the top heatsink temperature sensor IC400. Outputs comprise this sensors signal and two DC offset protection lines (ERR_POS and ERR_NEG), whic

4、h are returned to the system microprocessor via L129. CON105 carries the C, LS and RS outputs to the Speaker PCB L124. It also carries the speaker ground returns for all 7 channels back to the star ground point on L125. All 7 power amplifiers are identical, except for the Centre channel where only o

5、ne half of its set of the various dual driver ICs is used. Each power amplifier is topologically split into two halves the input stage IC, LM4702 high voltage driver IC and DC servo IC comprise the driver stage (e.g. U_driver_C); the power transistors plus their drivers and protection circuitry comp

6、rise the output stage (e.g. U_PA_C), as shown in the L125 block diagram. L124AY Speaker board L125AY Power amp upper Additionally the 3 power amplifier channels in L125 share a common pair of power MOSFET lifters (the part of the block diagram shown as U_Lifter_C) which control the amount of output

7、voltage fed to the collectors of the power transistors in the 3 power amplifiers. The Centre channel Driver Stage starts with the balanced to unbalanced converter IC700B (one half of an NJM2114) which rejects common mode noise on the input when grounded to AGND_FF via the handbag link CON700. Its ou

8、tput feeds one half of the stereo high voltage driver IC (LM4702C - IC701) via the low pass network R706 and C704. The LM4702 is used in a non-inverting configuration and provides all the voltage gain of the system, set by R713 and R704. Pins 11 and 12 of IC701 feed the inputs of the negative and po

9、sitive halves of the Output Stage. The dominant pole compensation is set by C705, C713/R714 provides some second order feedback in the audio band to provide a higher open loop gain at high audio frequencies and thus reduce hf distortion. R715 and R716 (without TR700 which is a “no fit”) provide some

10、 extra voltage to IC701s negative supply at high negative output voltages via a bootstrap arrangement in the output stage to prevent premature clipping of the negative half of the output. Note that the heatsink of IC701 is connected to its negative rail this must NOT be accidentally shorted to groun

11、d! Good power supplying decoupling of IC701 is essential and is provided by C701, C708, C709, C712 and C714. Note that the amplifier is DC coupled throughout. IC702B (one half of a TL072) has a very high input impedance and forms a ground referenced inverting integrator with R712 and C711; their tim

12、e constant is approximately 1.5 seconds. Its output is fed back to the positive input IC701 via the attenuator R711 and R706 to keep the DC output of the amplifier close to zero. It can also correct moderate DC offsets appearing at the input of IC700B. Should these become excessive, or should a circ

13、uit fault cause significant DC at the loudspeaker output, then the error voltage at the output of IC702B will feed through to the system microprocessor via D700 (which works in conjunction with the similar diodes in the other power amplifier channels as a wired OR gate) to generate a system shut dow

14、n signal. NB. R702 will also mute the power amplifier electronically in the absence of the +/- 12V supply. The Centre channel Output Stage comprises complementary triples in a classic emitter follower configuration, with enhancements to ensure near class A operation at power levels of up to about 10

15、 watts. Both the positive and negative halves are essentially identical. The pre-driver and driver transistors are connected to the high voltage rails Vcc and Vee (approx +/-59V). However because this is a Class G design the output transistors TR406A and TR409A normally run at half these voltages (+

16、Vlift and Vlift, approx +/- 30V) connecting to the +Vlo and Vlo supplies via Shottky power diodes D100 and D101 shown on the main block diagram. When the amplifier is required to deliver more than about +/- 25V peak (equivalent to about 30Watts rms into 8 ohms) then the lifters (fed from Vcc and Vee

17、) are progressively powered on to maintain a constant 5V or so across the collector-emitter junctions of the output transistors. Note that on L125 the lifter outputs are shared between all three power amplifiers for reasons of economy and space whereas the lifters on the other 4 channels on L129 are

18、 only shared between two power amplifiers each. Since the worst thermal stress on the lifters occurs at output powers somewhat above 30W rms equivalent into 8 ohms, we do not recommend testing the amplifier for extended times with continuous signals in the 30 - 50 Watts range with all three channels

19、 (C, SL and SR) running simultaneously and driving into low impedances. This is especially true of square wave signals! The thermal sensor IC400 is located close to the lifter MOSFETs in order to monitor this condition. The power transistors TR406A and TR409A have built in thermal compensation diode

20、s (TR406B and TR409B) which form part of the biasing network. The thermal sense biasing transistors TR401 and TR416 are thus mounted adjacent to (and ideally in intimate contact with) the driver transistors TR403 and TR414 so that as they warm up the bias remains relatively stable. (In practice it r

21、ises somewhat, but predictably so, as the drivers warm up). The pre-drivers, TR400 and TR415, are in a DC feedback loop with TR401 and TR416, so no thermal drift in bias occurs from these. Bias is set by RV400; D403 and R421 ensure that no catastrophic increase in bias will take place if RV400 fails

22、 open circuit. Optimum bias at quiescent operating temperature is measured across the two 0.1 ohm emitter resistors forming R408 it is typically 15mV at the pins of C400. When setting up from cold a good starting point to achieve this is to first turn RV400 to minimum (i.e. fully anticlockwise) and

23、then slowly turn it up to 6mV. The transistors TR405A and B and their associated networks provide comprehensive two slope safe operating area (SOA) protection for the output devices. When the prescribed combination of voltage and current across TR406A or TR409A is exceeded, the relevant protection t

24、ransistor conducts and shorts out the base drive to the associated pre-driver, thus limiting the dissipation in the output device. The output of each channel of the LM4702 is current limited to about 5-10mA so no damage can occur to it under these conditions. Note that if an output device fails shor

25、t circuit then the 7 Amp fuse in its collector will fail the driver transistors TR403 and TR414 will then try to take over and so are protected by 1 ohm fusible resistors in their collectors. Note that the heatsinks of the drivers TR403 and TR414 are “live” an accidental short to ground here with a

26、test probe will probably blow the associated 1 ohm fusible resistor. Diodes D402 and D405 protect the output transistors from being reverse biased in the presence of inductive load “spikes”. Diodes D401A/B form part of a wired OR gate system with the other power amplifier channels on L124 and are us

27、ed to drive the lifters connected to the collectors of TR406A and TR409A. R439 and C411 are part of a bootstrap network for the negative rail of IC701 and its associated pre-driver transistor TR415. R417 and C406 are a Zobel network (sometimes called a Boucherot cell) to help compensate for inductiv

28、e loads at high frequencies. The Class G Lifters are in two complimentary halves TR600, TR601 and TR602 plus p-channel power MOSFET M601 for the positive half, and TR603, TR604 and TR605 plus n-channel power MOSFET M603 for the negative half. They are arranged as CFPs (complementary feedback pairs)

29、rather than plain emitter (source) followers so that the MOSFETs can be fully turned on without needing power supplies that exceed Vcc and Vee. The two halves operate identically we will examine the positive (top half) lifter to see how it works. With only small signals coming from the power amplifi

30、er, node PLD_C remains biased at about +20V (via the network R614, D600, R602., R603, R605) whilst node +VLIFT_C is held at approximately +30V (i.e. +Vlo less the 0.2V or so dropped across the Shottky power diode D100). The emitter of TR602 meanwhile is at about +24.5V, so TR602 is turned hard off.

31、Thus the base of TR600 is connected via R600 to Vcc and the emitter is at Vcc 0.6V. Vgs of M601 is thus -0.6V which is well under the approx -2.5V required to turn on M601. When the voltage at node PLD_C exceeds approximately +25V this is enough to turn on TR602. When about 3V is developed across R6

32、00 this is enough to turn on M601 which conducts until the voltage at the emitter of TR602 has risen enough to stabilise the system. The output voltage then can rapidly track the input (plus about 5V) as required, reverse biasing the Shottky power diode D100 and drawing the collector current for TR4

33、06A via M600 and the +Vcc supply. The complementary emitter follower TR600, TR601 ensured the gate capacitance of the MOSFET can be both charged and discharged very quickly. C605 provides fast local decoupling to minimise switching transients. This contains the power amplifier electronics for the Le

34、ft (L), Right (R), Surround Back Left (SBL) and Surround Back Right (SBR) channels. It also contains housekeeping logic for the amplifier protection system and power drive circuits for the protection relays and cooling fans. The power amplifiers are essentially identical to those in L125, except tha

35、t the lifter circuits are only shared between pairs of power amplifiers (L and SBL, R and SBR respectively) rather than all three channels in L125. They receive their raw DC power voltages from L125 via CON100. Please refer to the description of the Centre Channel (C) power amplifier (in L125) for a

36、 detailed understanding of the circuitry of the power amplifiers in L129. CON102 carries the L, R, SBL and SBR output signals to the speaker board L124. It also delivers +24V DC power and logic level switching signals to the 4 speaker relays on L124. NB - the ground returns shown on CON102 do not ca

37、rry L129s main speaker currents back to the star point (which is located on L125) but are merely used for the L, R, SBL and SBR amplifiers optional extra Boucherot networks located on L124. Note that it is L129 which communicates with the rest of the receiver, via two ribbon cables connected to CON1

38、01 and CON 103. CON 101 receives 7 line level input signals, and low voltage supplies (+12V, -12V and +5V) from L117. CON101 also inputs the speaker relay mute signals for L124. CON103 supports temperature and DC offset monitoring for L125 and L129, plus a fan drive signal, sent to and from the syst

39、em microprocessor on L122, via L121. The heatsink temperature monitors on L129 are IC800 and IC900; these are located between the relevant pairs of lifter power MOSFETs. TR102 provides nominal +24V power to the output relays on L124, via the unregulated +30V supply on L125. The 27V zener diode DZ102

40、 prevents excessive voltage being applied to the relays in the event of high mains voltages. REG 101 is not normally used as links CON109 and CON110 are omitted in production. It provides +5V for the on board logic and temperature sensors if no +5V line is present (e.g. during development testing).

41、TR1003A/B and TR1001 together make a fan driver with a DC gain of 10, so it can be triggered with a 3V3 microprocessor signal. Power comes from the unregulated +Vlo supply (approx +30V). The fans are two 12V DC units connected in series fed from CON107 and CON108. IC1000 is a triple 3-input NAND gat

42、e. To switch on (i.e. unmute) the speaker relays, all 3 inputs on IC1000B (for LSB and RSB channels) and/or IC1000C (for the other 5 channels) must be high. The 3 inputs come from: (a) the AC present detector based around TR1002 and IC1000A, (b) the ERR_NEG and ERR_POS detector, based around TR1004A

43、/B, which detects excessive DC offsets on any one or more of the 7 power amplifier channels and (c) the MUTE_SB and MUTE_REST lines under the control of the system microprocessor. L129AY Power Amp lower This PCB handles the VFD, keyboard scan, IR reception for the front panel & power LEDs. The micro

44、 is an Atmel AT91SAM7S32 (IC101) which must be initially programmed via the Atmel/Segger debugger via CON101. Subsequently, the micro can be reprogrammed from the PW338 using the Arcam upgrader utility over RS232. The bootloader should never need to be updated and as such will not be included in the

45、 standard upgrading application. Communication with the PW338 is via RS232 IC101 sends information on keypresses to the PW338 & receives information to display & brightness commands from the PW338 FP_TX & FP_RX. Note these signals are labelled with respect to the PW338. IC101 uses +3V3_PW338 so is p

46、owered in standby. It has an internal 1V8 regulator which generates VDD_OUT (1V8, pin 8) which is decoupled & powers the core & PLL of IC101 (pins 18, 41 & 48). The VFD (DISP100) is driven from serial data SIN from IC101 (AT91SAM7S32 micro). The serial data is gated through IC102 (74HC08 quad NAND g

47、ate, parts C & D unused) controlled by SIN1_CTL & SIN2_CTL from IC101 to provide dimming of the display. The output data from IC102 is clocked into the display with the signal CLK from IC101 and is latched into the display during the blanking period (LAT & BLK). The VFD filament drive is synchronous

48、 with the display update. Signals FClock1 & FClock2 are 180deg out of phase and drive IC100 (AD8532 op amp) to give a 6V oscillating drive to the two ends of the filament (from +6V_1 L123). The HT is provided direct from L123 (+40V_VFD). +6V_1 & +40V_VFD are not present in standby. IR decoding (RX10

49、0) is powered by +5V_STBY, allowing IR reception when in standby. The signal pass through L121 (Connection) to L118 (Trigger) before going to L122 (Main PCB). The power LEDs are fitted to a small snap-off PCB that is connected via a 3 wire lead. Green LED when the unit is on, Red when in standby, both during power on. L126AY Front Panel This PCB handles the auxiliary input & headphone output. SKT101 carries the headphone output from L117 (Analogue output). There is also a switch to sense the headphones being inserted. Th