AudioControl-XD0MK2-xdo-sch维修电路原理图.pdf

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1、c 10 C3 C5 10 C7 0.1 C1 10 U3:A 7486 3 2 1 IN4004 D1 TP2 TP1 U5 NC7S32 V 5 G 3 4 2 1 TP4 TP5 47k R4 VDD CS8420 U1 R S T 9 OMCK 21 R E R R 1 1 R M C K 1 0 SDIN(MUTE) 14 ISCLK(PRO/C) 13 ILRCK(TCBLD) 12 RXN 5 RXP 4 F I L T 8 V A + 6 D G N D 2 2 V D + 2 3 TXN 25 SDOUT 18 A G N D 7 OSCLK 16 OLRCK 17 TXP

2、26 H / S 2 4 S / A E S 2 0 D F C 0 2 D F C 1 2 7 U / E M P H 3 C O P Y 1 O R I G 2 8 V / A U D I O 1 9 T C B L 1 5 AES3 IN Serial Out AES3 Out Serial In Misc. Control Clock Generator Output Master GNDDIGITAL GNDANALOG 3k RFILT CFILT 0.047 uF CRIP 0.0022 uF RP1 47k 10 9 8 7 6 5 4 3 2 1 JP1-JP9 RP2 47

3、k 10 9 8 7 6 5 4 3 2 1 VDD 300/1watt R2 C10 330 uF 39 uF C11 R3 10.5k R1 1k U8 VI 3 A 1 VO 2 U4 LM2950 VO 3 G 2 VI 1 C4 39uF C2 0.1uF FB1 C9 330 uF 0.1 C8 10 C6 VEE VDD VDD R12 FB8 0.1 C70 FB10 VDD VDD C77 FB9 600 ohms L1 Copyright 2003 Audio Crafters Guild 8 polarity XD0 DIR, AJR Filter, Upsampler

4、To U1 pin 11 (S3) CONFIG1 (S3) CONFIG0 (S3) CONFIG2 1 NPT RESET ACG 2001.9.1 XD0.S01 Master Clock Out NC7S86M5 VIDEO S2 R10 S2 R11 S2 R12 S3 U2p15 S3 U2p3 & JP12 S2 X2p5 S2 X2p8 S2 R5 S2 R7 S2 X1p5 S2 X1p8 S2 R8 S2 R76 S7 U20p7 out S7 4 in S7 LED3 ERROR S2 R13 SOT23 3 5 U3:B 9 April 2003 2.1 HWCONFI

5、GBUS/9 ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename RadioFans.CN 收音机爱 好者资料库 75 R76 R5 75 R8 75 R7 75 5 4 3 2 1 I2SIN:2 10 9 8 7 6 J6 10 9 8 7 6 5 4 3 2 1 J5 1 2 3 4 5 6 7 8 9 10 R10 R11 75 R13 VDD 0.1 uF C76 SPDIF IN J1 J2 SPDIF OUT 0.01 uF C75 C74 C73 C72 SC937 X2

6、P1 P2 S1 S2 SH R9 7575 R6 X1 SC937 SH S2 S1 P2 P1 c 9 April 2003 2.1 S1 U1p10 be cut if spare I/O pins are needed. Ground jumpers to pins 10 may 9 to 9 7 to 7 5 to 5 3 to 3 install jumpers For normal operation Expansion Port Optional RF bypass to chassis 5-6 Mode Jumper 2-4 I2S Inputs 1 = Clock Out

7、in Syncro Mode S1 U1p12 S1 U1p13 S1 U1p14 S1 U1p16 S1 U1p17 Fs S1 U1p18 Data S1 U1p21 S7 OSC2p3 S7 OSC1p3 64 Fs 256 Fs 256 Fs S3 R18 S3 R15 S3 R16 S3 R17 S1 U1p25 S1 U1p26 S1 U1p4 S1 U1p5 2 8 5 1 4 2 NPT S1 U1p14 Sheet In/Out label scheme Sheet number Device number or signal name Pin number if appli

8、caple ACG 2001.9.1 XD0.S02 XD0 Digital I/O Connections 8 Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename RadioFans.CN 收音机爱 好者资料库 FB11 VEE FB12 FB13 C18 0.1uF VEE 10k 10k 10k 10k 10k VDD JP13 JP14 JP15 JP16 JP17 C26 10 uF C25 10 uF C

9、24 0.1 uF 0.1 uF C16 10 uF C14 0.1 uF C15 10 uF C23 GNDDIGITALGNDANALOG 0.1 uF C21 10 uF C22 1 C12 C20 330 uF R14 100k 1k R80 U7 LM2950 VO 3 G 2 VI 1 1 C17 AD811 U6 - 2 + 3 4 7 5 6 8 1 V- V+ NC NC NC 600 ohms L2 C19 39uF R18 75 R17 75 R16 75 R15 75 U2 CS4396 M 4 2 M 3 3 M 2 4 M 1 1 4 M 0 5 R E S E T

10、 1 F I L T - 2 6 F I L T + 2 7 C / H 1 6 AOUTR- 19 CMOUT 25 AOUTR+ 20 AOUTL+ 23 AOUTL- 24 D G N D 9 V D 7 V D 8 D G N D 6 V A + 2 2 A G N D 1 8 A G N D 2 1 V R E F 2 8 SDATA 13 MCLK 10 SCLK 11 LRCK 12 M U T E 1 5 M U T E C 1 7 FB2 10 uF C13 FB3 JP12 c 2.1 9 April 2003 RP5 S2 R12 S2 R13 S2 R11 S2 R10

11、 S7 U20p7 S1 U5p4 S4 FB7 OR S8 FB101 S4 FB5 OR S8 FB100 S4 FB6 OR S8 FB103 S4 FB4 OR S8 FB102 CS43122 CS4397 or or MUTEC XD0.S03 ACG 2001.9.1 XD0 CS4396/7/122 DAC Stage 3 NPT S1 U1p14 Sheet In/Out label scheme Sheet number Device number or signal name Pin number if applicaple S1 U1p3 44k no emph. 44

12、k w/emph. M4 M3 M2 M1 M0 0 1 1 0 1 2 I S modes 0 0 1 0 1 1 1 1 0 1 1 1 0 0 1 DAC Sample Rate Configurations & Emphasis * Emphasis not available for 96k & 192k rates. 96k * 192k * 8 Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB1

13、6 FB17 FB15 FB14 C33 10 uF BG10 uF BG C34 10 uF BG C31C32 10 uF BG 10 uF BG C36C35 10 uF BG C38 10 uF BG10 uF BG C37 R24 75 LEFTOUT_J5 R25 75 RIGHTOUT_J6 C29 0.033uF 0.033uF C27 U9 INA103 +INPUT 1 +GAIN SENSE 2 G=100 14 +RG 6 RG 13 GAIN SENSE 15 INPUT 16 +G DRIVE 5 G DRIVE 12 N U L L 4 N U L L 3 V +

14、 9 V 8 SENSE 11 REF 7 OUPUT 10 open RG1 FB4 FB6FB7 FB5 RG2 open INA103 U10 OUPUT 10 REF 7 SENSE 11 V 8 V + 9 N U L L 3 N U L L 4 G DRIVE 12 +G DRIVE 5 INPUT 16 GAIN SENSE 15 RG 13 +RG 6 G=100 14 +GAIN SENSE 2 +INPUT 1 C28 0.033uF 0.033uF C30 c 9 April 2003 2.1 S6U17p2S6U19p3S6U18p3S6U16p2 S3 U2p20 S

15、3 U2p19 S3 U2p23 S3 U2p24 8 + + + + + + + XD0.S04 ACG 2001.9.1 XD0 Analog Stage NPT 4 Right Left Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB20 FB19 FB18 U11 VO 2 A 1 VI 3 330 uF C42 0.05 R26 R35 15 R34 470 R28 4300 R27 220 2N

16、4401 U12 330 uF C44 R30 300k R33 47k R31 10k R29 10k R32 1k C45 330 uF 39 uFC43 330 uF C39 LM833M U13:A - 2 + 3 4 8 1 C47 39 uF 330 uF C49 1k R42 10k R39 10k R41 47k R43 300k R40 C48 330 uF U15 2N4401 220 R37 4300 R38 470 R44 15 R45 R36 0.05 C46 330 uF LM833M U13:B - 6 + 5 7 GNDDIGITALGNDANALOG C78

17、C41330 uF 1k R19 10.5k R20 C79 39 uF D6 C40 330 uF 300/1watt R21 c 9 April 2003 2.1 VAOSC Vee ACG 2001.9.1 NPT XD0.S0558 C B E C B E * * * TO92 2N4401 Top View XD0 Clock Twin Shunt Regulator E B C Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A D

18、ate Filename FB25 FB24 FB23 FB22 C59 330 uF 330 uF C56 U17 VO 2 A 1 VI 3 1k R47 10.5k R51R57 10.5k R53 1k 39 uF C61 C55 39 uF U19 VO 3 A 1 VI 2 D3 D5 C52 330 uF 330 uF C53 R49 300/1watt 300/1watt R48 330 uF C50 D4 D2 U18 VI 2 A 1 VO 3 39 uF C54 C60 39 uF 1k R52 10.5k R56R50 10.5k R46 1k U16 VI 3 A 1

19、 VO 2 R55 300/1watt 300/1watt R54 330 uF C51 330 uF C57 330 uF C58 c 2.1 9 April 2003 -VA2 +VA2 J9 GND GND J7 Power In From External Supply 86XD0.S06 DK# P10298 $0.58/10 +15v Analog -15v Analog-15v Analog +15v Analog ACG 2001.9.1 XD0 Power Regulators NPT S4U9 S4U9 S4U10 S4U10 +VA1 GND -VA1 GND J8 sh

20、own on analog stage sheet #4. note: Output caps required for regulator stability S1C11, S1R3 S1U4p2 S1U8p3, S7RP4 S1L1, S2L2, S5U11 GND Vdd Vee GND Left Power Right Power DIR & DAC Regulator Input Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A D

21、ate Filename FB21 U20 MAX707 VCC 2 PFI 4 PFO 5 MR 1 RESET 7 RESET 8 G N D 3 R59 130k R58 1M 10 uF C80 C63 0.1 C62 0.1 OSC2 INH 1 GND 2 OUT 3 VCC 4 OSC1 VCC 4 OUT 3 GND 2 INH 1 LED4 LED3 LED2 LED1 LED5 LED6 LED7 J12 J10 VDD SYNCRO MUTE/RESET INVERT FSX FSY 10k RP3 87654321 VDD GNDDIGITAL RP4 560 1 2

22、3 4 5 6 7 8 VDD c 9 April 2003 2.1 VAOSC RESET VD+NC NPT S1 U1p14 Sheet In/Out label scheme Sheet number Device number or signal name Pin number if applicaple ACG 2001.9.1 Reset XD0 Clock, Control, & Reset XD0.S07 78 Master Clock S2 R13 & S3 R17 Master Clock S2 R13 & S3 R17 Master Clock J11 mounts L

23、ED1-7 V battery CHARGE Syncro/Spare Error/Reset FsY FsX Video Invert Emphasis Control And Status S1U3p2 S1U3p2 S1U1p3 S3U2p15 S1U1p19 S3U2p3 S1U5p4 Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename DACT 10k LATTN100 C W W C C W CFILT1

24、01 0.001 uF CFILT100 LUAHOT 10k LUACOLD 10k RELAY100:B RELAY101:B R109 50 1M R108 R118 1M R119 50 R116 200 R115 50k R117 200 R114 50k 0.22 uF C105 LEFTOUT R113 50k R112 50k 0.22 uF C103 V101 SHIELD 9 6 1 8 3 5 4 2 7 R110 1M R111 1M C104 220 uF 220 uF C101 1M R101 1M R100 V100 7 2 4 5 3 8 1 6 SHIELD

25、9 C100 0.22 uF 50k R102 50k R103 RIGHTOUT C102 0.22 uF 50k R104 200 R107 50k R105 200 R106 c 10 March 2003 1.5 and RATTN101. RUACOLD, RUAHOT, CFILT102, CFILT103, Repeat for right channel using Optional Volume Control & Filter to 0.0001 uF S3 U2p19 S3 U2p20 XD0.S08 Broskie Follower XD0 Tubed Analog S

26、tage ACG 2001.9.1 NPT heaters B+ B+ heaters Alt. Rk = 375ohms. 8 S3 U2p19 S3 U2p20 S3 U2p23 S3 U2p24 9 Left Right Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename D100 D101 1k R120 L1 L2 L1 L2 2N3904 U101 OPTIONAL MUTEIN MAX707 U100

27、G N D 3 RESET 8 RESET 7 MR 1 PFO 5 PFI 4 VCC 2 10 uF C110 FB105 FB104 0.1 C109 0.1 C108 JP100 U103 WM8816 LFO 3 LMO 2 RMO 15 RFO 14 D G N D 1 1 D V D D 7 A G N D 1 6 A V D D 1 RIN 13 RGND 12 CCLK 10 MUTEB 8 DATA 9 CSB 6 LGND 5 LIN 4 c LEFTIN 1 3 2 4 LEFTOUT 13 24 RIGHTOUT 4 2 3 1 10 uF C113 FB107 FB

28、106 0.1 C112 0.1 C111 JP101 U104 WM8816 LFO 3 LMO 2 RMO 15 RFO 14 D G N D 1 1 D V D D 7 A G N D 1 6 A V D D 1 RIN 13 RGND 12 CCLK 10 MUTEB 8 DATA 9 CSB 6 LGND 5 LIN 4 RIGHTIN 1 3 2 4 1M R121 130k R122 DCI/O U102 VO 3 G 2 VI 1 C106 39 uF C107 39 uF C114 1N4004 B E C UNMUTE RESETNC ACG 2001.9.1 NPT 89

29、XD0.S09 XD0 Tubed Analog Stage II Relay Control & Vol Control Option Copyright 2003 Audio Crafters Guild E B C Right Left Parts below dashed line optional for volume control. 132 B+ 5V 1.5 10 March 2003 ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename DACT 10k LATTN100

30、 C W W C C W CFILT101 0.001 uF CFILT100 LUAHOT 10k LUACOLD 10k RELAY100:B RELAY101:B R109 50 1M R108 R118 1M R119 50 R116 200 R115 50k R117 200 R114 50k 0.22 uF C105 LEFTOUT R113 50k R112 50k 0.22 uF C103 V101 SHIELD 9 6 1 8 3 5 4 2 7 R110 1M R111 1M C104 220 uF 220 uF C101 1M R101 1M R100 V100 7 2

31、4 5 3 8 1 6 SHIELD 9 C100 0.22 uF 50k R102 50k R103 RIGHTOUT C102 0.22 uF 50k R104 200 R107 50k R105 200 R106 c 10 March 2003 1.5 and RATTN101. RUACOLD, RUAHOT, CFILT102, CFILT103, Repeat for right channel using Optional Volume Control & Filter to 0.0001 uF S3 U2p19 S3 U2p20 XD0.S08 Broskie Follower

32、 XD0 Tubed Analog Stage ACG 2001.9.1 NPT heaters B+ B+ heaters Alt. Rk = 375ohms. 8 S3 U2p19 S3 U2p20 S3 U2p23 S3 U2p24 9 Left Right Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB21 U20 MAX707 VCC 2 PFI 4 PFO 5 MR 1 RESET 7 RESE

33、T 8 G N D 3 R59 130k R58 1M 10 uF C80 C63 0.1 C62 0.1 OSC2 INH 1 GND 2 OUT 3 VCC 4 OSC1 VCC 4 OUT 3 GND 2 INH 1 LED4 LED3 LED2 LED1 LED5 LED6 LED7 J12 J10 VDD SYNCRO MUTE/RESET INVERT FSX FSY 10k RP3 87654321 VDD GNDDIGITAL RP4 560 1 2 3 4 5 6 7 8 VDD c 9 April 2003 2.1 VAOSC RESET VD+NC NPT S1 U1p1

34、4 Sheet In/Out label scheme Sheet number Device number or signal name Pin number if applicaple ACG 2001.9.1 Reset XD0 Clock, Control, & Reset XD0.S07 78 Master Clock S2 R13 & S3 R17 Master Clock S2 R13 & S3 R17 Master Clock J11 mounts LED1-7 V battery CHARGE Syncro/Spare Error/Reset FsY FsX Video In

35、vert Emphasis Control And Status S1U3p2 S1U3p2 S1U1p3 S3U2p15 S1U1p19 S3U2p3 S1U5p4 Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB25 FB24 FB23 FB22 C59 330 uF 330 uF C56 U17 VO 2 A 1 VI 3 1k R47 10.5k R51R57 10.5k R53 1k 39 uF C

36、61 C55 39 uF U19 VO 3 A 1 VI 2 D3 D5 C52 330 uF 330 uF C53 R49 300/1watt 300/1watt R48 330 uF C50 D4 D2 U18 VI 2 A 1 VO 3 39 uF C54 C60 39 uF 1k R52 10.5k R56R50 10.5k R46 1k U16 VI 3 A 1 VO 2 R55 300/1watt 300/1watt R54 330 uF C51 330 uF C57 330 uF C58 c 2.1 9 April 2003 -VA2 +VA2 J9 GND GND J7 Pow

37、er In From External Supply 86XD0.S06 DK# P10298 $0.58/10 +15v Analog -15v Analog-15v Analog +15v Analog ACG 2001.9.1 XD0 Power Regulators NPT S4U9 S4U9 S4U10 S4U10 +VA1 GND -VA1 GND J8 shown on analog stage sheet #4. note: Output caps required for regulator stability S1C11, S1R3 S1U4p2 S1U8p3, S7RP4

38、 S1L1, S2L2, S5U11 GND Vdd Vee GND Left Power Right Power DIR & DAC Regulator Input Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB20 FB19 FB18 U11 VO 2 A 1 VI 3 330 uF C42 0.05 R26 R35 15 R34 470 R28 4300 R27 220 2N4401 U12 330

39、uF C44 R30 300k R33 47k R31 10k R29 10k R32 1k C45 330 uF 39 uFC43 330 uF C39 LM833M U13:A - 2 + 3 4 8 1 C47 39 uF 330 uF C49 1k R42 10k R39 10k R41 47k R43 300k R40 C48 330 uF U15 2N4401 220 R37 4300 R38 470 R44 15 R45 R36 0.05 C46 330 uF LM833M U13:B - 6 + 5 7 GNDDIGITALGNDANALOG C78 C41330 uF 1k

40、R19 10.5k R20 C79 39 uF D6 C40 330 uF 300/1watt R21 c 9 April 2003 2.1 VAOSC Vee ACG 2001.9.1 NPT XD0.S0558 C B E C B E * * * TO92 2N4401 Top View XD0 Clock Twin Shunt Regulator E B C Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename

41、FB16 FB17 FB15 FB14 C33 10 uF BG10 uF BG C34 10 uF BG C31C32 10 uF BG 10 uF BG C36C35 10 uF BG C38 10 uF BG10 uF BG C37 R24 75 LEFTOUT_J5 R25 75 RIGHTOUT_J6 C29 0.033uF 0.033uF C27 U9 INA103 +INPUT 1 +GAIN SENSE 2 G=100 14 +RG 6 RG 13 GAIN SENSE 15 INPUT 16 +G DRIVE 5 G DRIVE 12 N U L L 4 N U L L 3

42、V + 9 V 8 SENSE 11 REF 7 OUPUT 10 open RG1 FB4 FB6FB7 FB5 RG2 open INA103 U10 OUPUT 10 REF 7 SENSE 11 V 8 V + 9 N U L L 3 N U L L 4 G DRIVE 12 +G DRIVE 5 INPUT 16 GAIN SENSE 15 RG 13 +RG 6 G=100 14 +GAIN SENSE 2 +INPUT 1 C28 0.033uF 0.033uF C30 c 9 April 2003 2.1 S6U17p2S6U19p3S6U18p3S6U16p2 S3 U2p2

43、0 S3 U2p19 S3 U2p23 S3 U2p24 8 + + + + + + + XD0.S04 ACG 2001.9.1 XD0 Analog Stage NPT 4 Right Left Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size A Date Filename FB11 VEE FB12 FB13 C18 0.1uF VEE 10k 10k 10k 10k 10k VDD JP13 JP14 JP15 JP16 JP17 C2

44、6 10 uF C25 10 uF C24 0.1 uF 0.1 uF C16 10 uF C14 0.1 uF C15 10 uF C23 GNDDIGITALGNDANALOG 0.1 uF C21 10 uF C22 1 C12 C20 330 uF R14 100k 1k R80 U7 LM2950 VO 3 G 2 VI 1 1 C17 AD811 U6 - 2 + 3 4 7 5 6 8 1 V- V+ NC NC NC 600 ohms L2 C19 39uF R18 75 R17 75 R16 75 R15 75 U2 CS4396 M 4 2 M 3 3 M 2 4 M 1

45、1 4 M 0 5 R E S E T 1 F I L T - 2 6 F I L T + 2 7 C / H 1 6 AOUTR- 19 CMOUT 25 AOUTR+ 20 AOUTL+ 23 AOUTL- 24 D G N D 9 V D 7 V D 8 D G N D 6 V A + 2 2 A G N D 1 8 A G N D 2 1 V R E F 2 8 SDATA 13 MCLK 10 SCLK 11 LRCK 12 M U T E 1 5 M U T E C 1 7 FB2 10 uF C13 FB3 JP12 c 2.1 9 April 2003 RP5 S2 R12 S

46、2 R13 S2 R11 S2 R10 S7 U20p7 S1 U5p4 S4 FB7 OR S8 FB101 S4 FB5 OR S8 FB100 S4 FB6 OR S8 FB103 S4 FB4 OR S8 FB102 CS43122 CS4397 or or MUTEC XD0.S03 ACG 2001.9.1 XD0 CS4396/7/122 DAC Stage 3 NPT S1 U1p14 Sheet In/Out label scheme Sheet number Device number or signal name Pin number if applicaple S1 U

47、1p3 44k no emph. 44k w/emph. M4 M3 M2 M1 M0 0 1 1 0 1 2 I S modes 0 0 1 0 1 1 1 1 0 1 1 1 0 0 1 DAC Sample Rate Configurations & Emphasis * Emphasis not available for 96k & 192k rates. 96k * 192k * 8 Copyright 2003 Audio Crafters Guild ABCD 4 3 2 1 DCBA 1 2 3 4 ofSheet Drawn by RevNumber Title Size

48、A Date Filename 75 R76 R5 75 R8 75 R7 75 5 4 3 2 1 I2SIN:2 10 9 8 7 6 J6 10 9 8 7 6 5 4 3 2 1 J5 1 2 3 4 5 6 7 8 9 10 R10 R11 75 R13 VDD 0.1 uF C76 SPDIF IN J1 J2 SPDIF OUT 0.01 uF C75 C74 C73 C72 SC937 X2P1 P2 S1 S2 SH R9 7575 R6 X1 SC937 SH S2 S1 P2 P1 c 9 April 2003 2.1 S1 U1p10 be cut if spare I

49、/O pins are needed. Ground jumpers to pins 10 may 9 to 9 7 to 7 5 to 5 3 to 3 install jumpers For normal operation Expansion Port Optional RF bypass to chassis 5-6 Mode Jumper 2-4 I2S Inputs 1 = Clock Out in Syncro Mode S1 U1p12 S1 U1p13 S1 U1p14 S1 U1p16 S1 U1p17 Fs S1 U1p18 Data S1 U1p21 S7 OSC2p3 S7 OSC1p3 64 Fs 256 Fs 256 Fs S3 R18 S3 R15 S3 R16 S3 R17 S1 U1p25 S1 U1p26 S1 U1p4 S1 U1p5 2 8 5 1 4 2 NPT S1 U1p14 Sheet In/Out label scheme Sheet number Device number