《Daewoo-DGK511S-dvd-sm 电路图 维修手册.pdf》由会员分享,可在线阅读,更多相关《Daewoo-DGK511S-dvd-sm 电路图 维修手册.pdf(68页珍藏版)》请在收音机爱好者资料库上搜索。
1、Service Manual MODEL: DG-K511S DG-K513S DG-K516S Caution : In this Manual, some parts can be changed for improving, their performance without notice in the parts list. So, if you need the latest parts information,please refer to PPL(Parts Price List) in Service Information Center. Jaunary. 2006 DVD
2、PLAYER Sm(DAEWOO_DG-K511S)060115.indd 12006-1-16 15:30:46 RadioFans.CN 收音机爱 好者资料库 CONTENTS CONTENTS SPECIFICATIONS.2 CIRCUIT OPERATIONAL DESCRIPTION.3 VOLTAGE CHARTS.3 CIRCUIT DIAGRAM.4 PCB CIRCUIT BOARD.26 WAVEFORMS.36 TROUBLE SHOOTING.43 INSTRUMENT DISASSEMBLY.48 PARTLIST.55 Sm(DAEWOO_DG-K511S)060
3、115.indd 12006-1-16 15:30:46 RadioFans.CN 收音机爱 好者资料库 2 Laserwavelength 650nm VideoPAL/AUTO/NTSC Frequency response20Hz 20KHz (dB) Signal/noise ratio90dB Channel separation85dB ( KHz) Dynamic range80dB ( KHz) Output Audio Analog output level : 2.0 + 0/-0.2Vrms (Load impedance : ,0K) Digital output le
4、vel : 0.5 0.Vp-p (Load impedance : 75) Output Video Composite output level : .0 0.Vp-p (Load impedance : 75, imbalance, negative polarity) S-video output level : brightness(Luma) .0 0.Vp-p Chromaticity (Color) 0.286 20% (Load impedance : 75) ComponentY: Vp-p, Pb/Pr: 0.7Vp-p (Load impedance : 75) Pow
5、er00-240V, 50Hz60Hz 2W Dimensiones Body (W x H x D)430 x 38 x 245 mm Packing50 x 88 x 305 mm Weight (Gross / Net)2.9Kg / 2.2Kg Notes : Design and specifications in this instruction manual are subjected to change with- out prior notice toimprove quality and function. DVD Audio output standards Output
6、 Disc type DVDVIDEO-CDCD Analogue Audio output48/96KHz sampling44.KHz sampling44.KHz sampling Digital Audio output48KHz sampling44.KHz sampling44.KHz sampling SPECIFICATIONS Sm(DAEWOO_DG-K511S)060115.indd 22006-1-16 15:30:47 RadioFans.CN 收音机爱 好者资料库 3 DVD Module . Summary DVD One Board consists of: L
7、oader part that reads and transmits audio and video data saved at Optic Discs (DVD, CD-DA, VCD, CD-R) to MPEG Decoder part; MPEG Decoder part, which, by decoding and encoding data received from the Loader, produces analog signals; and u-Com that controls the overall system including the loader and M
8、PEG decoder. 2. How Does it Operate Insert the power cord and then power transmitted to each IC, and the SET will be the STAND- BY status which requires the least power for input the front panel key, input the STAND BY/ ON key, extinguished the LED. Once the Power On key is entered, u-Com recognizes
9、 it and initiates each chipset, performs sequential algorithms such as determining whether the disc is in or not, and if in, what type of disc is loaded. Through this process, it can read disc data before transmitting it to the MPEG Decoder. The MPEG Decoder will then decode and encode such data bef
10、ore generating the final analog audio and video signal outputs. DVD-MODULE Block Diagram CIRCUIT OPERATIONAL DESCRIPTION Sm(DAEWOO_DG-K511S)060115.indd 32006-1-16 15:30:48 4 CIRCUIT OPERATIONAL DESCRIPTIONCIRCUIT OPERATIONAL DESCRIPTION 3. Loader Part The loader which read the data of audio/video fr
11、om optic disc and transfer them to MPEG decoder can be divided into Deck total DVD assay(in a short term, Mecha) and Servo. Mecha mounts with the optical pick-up which allows reading the signal of a disc using laser beam and makes it operates and consists of the deck mechanism which allows loading a
12、 disc and reading the data. Servo is a sort of circuit which allows operating the loader and recovering the data and consists of Motor Drive IC operating the spindle, the sled, the loading motor. Loader Block Diagram Sm(DAEWOO_DG-K511S)060115.indd 42006-1-16 15:30:48 5 CIRCUIT OPERATIONAL DESCRIPTIO
13、N ) Motor Drive IC: AT5668S The AT5668S is a 5-channel BTL driver IC for driving the motors and actuators in products such as CD-ROM/DVD-ROM/DVD-Player drives. Two of the channels use current feedback to minimize the current phase shift caused by the influence of load inductance. Driver IC gener- at
14、es the focus signal and the tracking signal for pick-up actuator, the sled signal for feed, spindle signal and the load signal for opening and closing of the tray. The focus signal, the tracking signal, the sled signal and the spindle signal are input into each relaxant port of the drive IC(in the o
15、rder of No. 26 pin, 23, 4, and ) and set the gain amplification and the center voltage through the internal OP-AMP and drive on both sides and then the focus sig- nal and the tracking signal will be output as VOFC+, VOFC- and VOTK+, VOTK- on actuator, the sled signal and the spindle signal will be o
16、utput as VOSL+, VOSL- and VOLD+, VOLD- on each motor. For the load signal the input opening/closing signal is output as VOTR+, VOTR- through the loading PRE FWD REV circuit. Motor Drive IC (AT5668S) Block Diagram ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
17、 ? ? ? ? CIRCUIT OPERATIONAL DESCRIPTION Sm(DAEWOO_DG-K511S)060115.indd 52006-1-16 15:30:49 6 CIRCUIT OPERATIONAL DESCRIPTION MPEG Decoder The signal read from DVD disc is output into the RF signal and Servo related signal through the RF IC and they are input into the MPEG decoder and processed the
18、MPEG decoding and divided into video/audio signal. The video signal is output into the analog audio signal through the built-in encoder block and also the audio signal into the audio DAC through the audio decoder block. MPEG decoder consists of existing MPEG-2 decoder and single chip combined the di
19、gital sig- nal processing part which is the core technology of DVD player with the Servo controller. ) DVD Servo And MPEG-2 Decoder : MT389 MediaTek MT389 is a DVD player system-on-chip (SOC) which incorporates advanced features like high quality TV encoder and state-of-art de-interlace processing.
20、The MT389 enables consumer electronics manufacturers to build high quality, cost-effec- tive DVD players, portable DVD players or any other home entertainment audio/video devices. Based on MediaTeks world-leading DVD player SOC architecture, the MT389 is the 3rd generation of the DVD player SOC. It
21、integrates the MediaTek 2nd generation front-end analog RF amplifier and the Servo/MPEG AV decoder. The progressive scan of the MT389 utilized advanced motion-adaptive de-interlace algorithm to achieve the best movie/video playback. It also supports a 3:2 pull down algorithm to give the best film ef
22、fect. The 08MHz/2-bit video DAC provides users a whole new viewing experience. DVD Player System Diagram Sm(DAEWOO_DG-K511S)060115.indd 62006-1-16 15:30:50 7 CIRCUIT OPERATIONAL DESCRIPTION MT389 Functional Block Diagram Sm(DAEWOO_DG-K511S)060115.indd 72006-1-16 15:30:50 8 CIRCUIT OPERATIONAL DESCRI
23、PTION 2) Flash Memory : ES29LV60DB-70TG Description The ES29LV60 is a 6 megabit, 3.0 volt-only flashmemory device, organized as 2M x 8 bits (Bytemode) or M x 6 bits (Word mode) which is config-urable by BYTE#. Four boot sectors and thirty onemain sectors are provided : 6Kbytes x , 8Kbytesx 2, 32Kbyt
24、es x and 64Kbytes x 3. The device ismanufactured with ESIs proprietary, high performance and highly reliable 0.8um CMOS flashtechnology. The device can be programmed orerased in-system with standard 3.0 Volt Vcc supply( 2.7V-3.6V) and can also be programmed in stan-dard EPROM programmers. The device
25、 offers min-imum endurance of 00,000 program/erase cyclesand more than 0 years of data retention. The ES29LV60 offers access time as fast as 70nsor 90ns, allowing operation of high- speed microprocessors without wait states. Three separate controlpins are provided to eliminate bus contention : chipe
26、nable (CE#), write enable (WE#) and outputenable (OE#). All program and erase operation are automaticallyand internally performed and con- trolled by embed-ded program/erase algorithms built in the device.The device automati- cally generates and times thenecessary high-voltage pulses to be applied t
27、o thecells, performs the verification, and counts the number of sequences. Some status bits (DQ7, DQ6 andDQ5) read by data# polling or toggling betweenconsecutive read cycles pro- vide to the users theinternal status of program/erase operation: whetherit is successfully done or still being progresse
28、d. The ES29LV60 is completely compatible with theJEDEC standard command set of sin- gle power sup-ply Flash. Commands are written to the internalcommand register using standard write timings ofmicroprocessor and data can be read out from thecell array in the device with the same way as used inother
29、EPROM or flash devices. Sm(DAEWOO_DG-K511S)060115.indd 82006-1-16 15:30:51 9 CIRCUIT OPERATIONAL DESCRIPTION FLASH ES29LV60 Block Diagram Sm(DAEWOO_DG-K511S)060115.indd 92006-1-16 15:30:51 0 CIRCUIT OPERATIONAL DESCRIPTION 3) EEPROM : AT24C6A This stores the information related to setup of DVD menus
30、. This can read and write the op- tional information such as OSD, voice, language option after function for subtitle etc, the aspect or method of TV display, video option like display function and audio, screen saver, parental function through the I2C transmission method. Description The AT24C6A pro
31、vides 6384 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 2048 words of 8 bits each. The device is op- timized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C6A is available in spa
32、ce saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and .8V (.8V to 5.5V) versions. Sm(DAEWOO_DG-K511S)060115.indd 102006-1-16 15:30:52 CIRCUIT OPERATIONAL DES
33、CRIPTION 4) SDRAM : AW39S206-7 Description The AW39S206-7s organlzed as 2-bank x ,048,576-word x 6-bit(2Mx6), fabri- cated with high performance CMOS technology, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of
34、operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high per- formance memory system applications. DQ0 DQ15 UDQM LDQM CLK CKE A10 CLOCK BUFFER COMMAND DECODER ADDRESS BUFFER REFRESH COUNTER COLUMN COUNTER CON
35、TROL SIGNAL GENERATOR MODE REGISTER COLUMN DECODER SENSE AMPLIFIER CELL ARRAY BANK #2 COLUMN DECODER SENSE AMPLIFIER CELL ARRAY BANK #0 COLUMN DECODER SENSE AMPLIFIER CELL ARRAY BANK #3 DATA CONTROL CIRCUIT DQ BUFFER COLUMN DECODER SENSE AMPLIFIER CELL ARRAY BANK #1 NOTE: The cell array configuratio
36、n is 4096 * 256 * 16 REDOCED WOR REDOCED WOR REDOCED WORREDOCED WOR A0 A9 BS0 BS1 CS RAS CAS WE A11 SDROM AW39S206-7 Block Diagram Sm(DAEWOO_DG-K511S)060115.indd 112006-1-16 15:30:53 2 CIRCUIT OPERATIONAL DESCRIPTION 5) DAC : CS4360 Description The CS4360 is a complete 6-channel digital-to-analog sy
37、stem including digital inter- polation, fourth-order delta-sigma digital-to-analog conversion, digital deemphasis, volume control, channel mixing and analog filtering. The advantages of this architecture include: ideal differential linearity, no distortion mechanisms due to resistor matching errors,
38、 no linearity drift over time and tempera-ture and a high tolerance to clock jitter. The CS4360 accepts data at audio sample rates from 4kHz to 200kHz, consumes very little power and operates over a wide power supply range. These features are ideal for cost-sensitive, multi-channel audio systems inc
39、luding DVD players, A/V receivers, set-top boxes, digital TVs and VCRs, mini-component systems, and mixing consoles. DAC CS4360 Block Diagram Sm(DAEWOO_DG-K511S)060115.indd 122006-1-16 15:30:54 3 Power board output voltage J Pin number23456789 Output voltageGNDS5V3.3VD5VGNDA5VGND+2V-2V J2 Pin number
40、23456 Output voltageSWF-F+GND-24VSTB5V Decode board input voltage CN Pin number23456789 Output voltageGNDS5V3.3VD5VGNDA5VGND+2V-2V VOLTAGE CHARTS Sm(DAEWOO_DG-K511S)060115.indd 132006-1-16 15:30:54 4 CIRCUIT DIAGRAM 1. POWER SUPPLY SCHEMATIC DIAGRAM Sm(DAEWOO_DG-K511S)060115.indd 142006-1-16 15:30:5
41、6 CIRCUIT DIAGRAM 5 2. DECODE BOARD SCHEMATIC DIAGRAM ) INDEX SCHEMATIC DIAGRAM Sm(DAEWOO_DG-K511S)060115.indd 152006-1-16 15:30:57 CIRCUIT DIAGRAM 6 2) RF check pin# 194, 196, 198, 200, 202, 203 of U2 (1389C) Check MPEG system module Is signal output from part Q10, Q11, Q12, Q14, Q16 ,Q17 Check Tri
42、ode Check PCB pattern Sm(DAEWOO_DG-K511S)060115.indd 452006-1-16 15:31:49 TROUBLE SHOOTING 46 4. AUDIO OUTPUT CIRCUIT YES YES YES YES YES N O N O N O N O N O N O NO sound Pin #1, 8, 14 ,22 of U16 is +5V Check POWER circuit Pin #27 of U16 is digital signal SDAT02, SBCLK, SLRCK, SACLK Replace the U2 A
43、udio Signal from pin#19, 20, 23, 24, 26, 27 of U16 Cheack inserted part C204 , C203 , C178 , C177 Check audio signal from p in#1 , 7 of U11 , U13 , U14 Check parts: C233,R201,Q36,L49, C161,R123,Q18,L38, C235,R203,L50,Q37, C168,R132,L39,Q19, C174,R141,Q20,L40, C182,R155,Q21,L41, C191,R166,Q25,L42, C1
44、99 , R176 ,Q 27 , L43 Replace bad parts Replace U16 Check C160,R121,R122,C167, R130,R131,C173,R139, R140,C181,R153,R154, C190,R163,R164,C198, R173,R174,U11,U13, U14 and Replace bad parts Sm(DAEWOO_DG-K511S)060115.indd 462006-1-16 15:31:50 TROUBLE SHOOTING 47 5. MPEG BOARD YES NO YES NO YES NO YES NO
45、 YES NO NO Bad soldering of R24 can make white and black screen NO Check soldering or replace it +1.8V regulator(U1) Check that voltage is between 1.7v-1.9v Check all Connectors CN1 Check +3.3v (Pin7) Check +3.3v (Pin4.5.8) Check Power Circuit +3.3v regulator(FB L27) for SDRAM(U6) Check +3.3V Check soldering or replace it RESET Sig