Yamaha-RXA-720-Service-Manual-Part-2电路原理图.pdf

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1、P2. PROTECTION HISTORY This menu is used to display the history of protection function. All history of protection function will be erased by pressing the “STRAIGHT” key. * Numeric values in the figure are given as reference only. S1. FIRMWARE UPDATE Not for service. S1-1 F / W U P D A T E ? S2. SET

2、INFORMATION The model name and destination of this unit are displayed. S2-1. MODEL The model name of this unit is displayed. S2-1 M D L : V 6 7 3 2 5 5 Not for service. Model name V673 : RX-V673 6065 : HTR-6065 A720 : RX-A720 P2-1. History 1 H: Displayed when the voltage is HIGHER than upper limit.

3、L: Displayed when the voltage is LOWER than lower limit. xxx: A/D conversion value of voltage at the moment when the protection function worked. (Reference voltage: 3.3 V=255) P2-2. History 2 P2-3. History 3 P2-4. History 4 P2-1 1 s t : P S 2 0 0 0 L P2-2 2 n d : T M P 1 0 0 0 L P2-3 3 r d : D C 0 0

4、 0 L P2-4 N o P r t 61 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 S2-2 D E S T : U 2 8 A/D conversion value Destination S2-2. DESTINATION The destination of this unit is displayed. S3. FACTORY PRESET This menu is used to reserve/inhibit initialization of the back-up IC (EEPROM: IC82 on DIGIT

5、AL P.C.B.). S 3 - 1 PRESET:INH S 3 - 1 PRESET:RSRV S3-1. PRESET INHIBIT (Initialization inhibited) Initialization of the back-up IC is not executed. Select this sub-menu to protect the values set by the user. S3-1. PRESET RESERVED (Initialization reserved) Initialization of the back-up IC is reserve

6、d. (Actual initialization is executed when the power is turned on next.) To reset to the original factory settings or to reset the backup IC, select this sub-menu and press the “MAIN ZONE ” key to turn off the power. CAUTION: Before setting to the PRESET RESERVED, write down the existing preset memo

7、ry content of the tuner. (This is because setting to the PRESET RESERVED will cause the user memory content to be erased.) DestinationJUCR (R, S)TKABG (B, G, F)L (L, H) A/D conversion value (3.3 V=255) 0 1213 3940 6768 9293 115116 140141 169199 221222 244 S2-3 D B G : 2 5 5 S2-4 N R C : 0 S2-3. DEBU

8、G Not for service. S2-4. NET RESTART COUNTER Not for service. 62 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 S4. ROM VERSION/CHECKSUM The firmware version and checksum values are displayed. The checksum is obtained by adding the data at every 8-bit and expressing the result as a hexadecimal n

9、otation. * Numeric values in the figure are given as reference only. S 4 - 1 SYS-VER. 1 . 1 0 S 4 - 2 VER.0004 0 S 4 - 3 SUM.F0EA S 4 - 4 FR-V.000 2 9 S 4 - 5 FR-S.D2A 0 S 4 - 6 S-VER.00 4 1 S 4 - 7 S-SUM.99 2 2 4 5 E F S 4 - 8 D1-V. 1 . 0 6 r 3 S 4 - 9 D1-S.47C D 4 9 C 3 S 4 - 1 0 INVALID I T E M S

10、4-1. SYSTEM VERSION The firmware version is displayed. S4-2. MICROPROCESSOR VERSION The firmware version of MICROPROCESSOR (IC83 on DIGITAL P.C.B.) is displayed. S4-3. MICROPROCESSOR CHECKSUM The checksum value of MICROPROCESSOR (IC83 on DIGITAL P.C.B.) is displayed. S4-4. FLASH ROM VERSION The firm

11、ware version of FLASH ROM (IC77 on DIGITAL P.C.B.) is displayed. S4-5. FLASH ROM CHECKSUM The checksum value of FLASH ROM (IC77 on DIGITAL P.C.B.) is displayed. S4-6. NETWORK MICROPROCESSOR VERSION The firmware version of Network microprocessor (IC951 on DIGITAL P.C.B.) is displayed. S4-7. NETWORK M

12、ICROPROCESSOR CHECKSUM The checksum value of Network microprocessor (IC951 on DIGITAL P.C.B.) is displayed. S4-8. DSP1 VERSION The firmware version of DSP1 (IC921 on DIGITAL P.C.B.) is displayed. S4-9. DSP1 CHECKSUM The checksum value of DSP1 (IC921 on DIGITAL P.C.B.) is displayed. S4-10. INVALID IT

13、EM Not for service. 63 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 S 4 - 1 1 INVALID ITE M S 4 - 1 2 G-V.0000061 3 6 S 4 - 1 3 FPGA-G-V. 1 8 S 4 - 1 4 FPGA-S-V. 1 2 S 4 - 1 5 FPGA-H-V. 6 S 4 - 1 6 INVALID ITE M S 4 - 1 7 INVALID ITE M S4-11. INVALID ITEM Not for service. S4-12. GUI VERSION Th

14、e firmware version of GUI data is displayed. S4-13. FPGA GUI VERSION The firmware version of GUI section in FPGA (IC50 on DIGITAL P.C.B.) is displayed. S4-14. FPGA SD (Standard Definition) VERSION The firmware version of SD I/P scaler section in FPGA (IC50 on DIGITAL P.C.B.) is displayed. S4-15. FPG

15、A HD (High Definition) VERSION The firmware version of HD I/P scaler section in FPGA (IC50 on DIGITAL P.C.B.) is displayed. S4-16. INVALID ITEM Not for service. S4-17. INVALID ITEM Not for service. 64 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 POWER AMPLIFIER ADJUSTMENT 1. Right after power

16、is turned on, confirm that the voltage across the terminals of R1152 (SURROUND BACK Rch), R1154 (SURROUND Rch), R1150 (FRONT Rch), R1148 (CENTER), R1149 (FRONT Lch), R1153 (SURROUND Lch) and R1151 (SURROUND BACK Lch) are within the confines of 0.1 mV to 10 mV. 2. If measured voltage exceeds 10 mV, o

17、pen (cut off) R1104 (SURROUND BACK Rch), R1106 (SURROUND Rch), R1102 (FRONT Rch), R1100 (CENTER), R1101 (FRONT Lch), R1105 (SURROUND Lch) and R1103 (SURROUND BACK Lch), and then reconfirm the voltage. Attention If the measured voltage exceeds 10 mV after repairing the power amplifier, check other pa

18、rts again for any possible defect before cutting the resistor. 3. Confirm that the voltage is within the confines of 0.2 mV to 15 mV after 60 minutes. 0.1 mV 10 mV (DC) R1104 (SURROUND BACK Rch) R1106 (SURROUND Rch) R1102 (FRONT Rch) R1100 (CENTER) R1101 (FRONT Lch) R1105 (SURROUND Lch) R1103 (SURRO

19、UND BACK Lch) R1152 (SURROUND BACK Rch) R1154 (SURROUND Rch) R1150 (FRONT Rch) R1148 (CENTER) R1149 (FRONT Lch) R1153 (SURROUND Lch) R1151 (SURROUND BACK Lch) Open (cut off) Front side MAIN (1) P.C.B. R1154 R1153R1152R1151 R1150R1149 R1148 R1106 R1105 R1104 R1100 R1101 R1103 R1102 65 RX-V673/HTR-606

20、5/RX-A720 RX-V673/HTR-6065/ RX-A720 DISPLAY DATA RX-V673/HTR-6065 Note : 1) F1, F2 . Filament pin 2) NP . No pin 3) NX . No extend pin 4) 1G-18G . Grid pin Pin No. Connection Pin No.69 F2NX 68 67 NP 66 NP 65 P1 64 P2 63 P3 62 P4 61 P5 60 P6 59 P7 58 P8 57 P9 56 P10 55 P11 54 P12 53 P13 52 P14 51 P15

21、 50 P16 49 P17 48 P18 47 P19 46 P20 45 P21 44 P22 43 P23 42 P24 41 P25 40 P26 39 P27 38 P28 37 P29 34 P32 33 P33 32 P34 31 P35 30 P36 29 28 NXNX 27 NX 26 NX 25 NX 24 NX 23 NX 22 18G 21 17G 20 16G 19 15G 18 14G 17 13G 16 12G 15 11G 14 10G 13 9G 12 8G 11 7G 10 6G 9 5G 8 4G 7 3G 6 2G 5 1G 4 NP 3 NP 36

22、P30 35 P31 21 F1NX Connection PIN CONNECTION GRID ASSIGNMENT 2G1G3G4G5G6G7G11G10G9G8G12G13G14G 15G17G16G17G18G 1-12-13-14-15-1 1-2 1-3 1-4 1-5 1-6 1-7 2-2 2-3 2-4 2-5 2-6 2-7 3-2 3-3 3-4 3-5 3-6 3-7 4-2 4-3 4-4 4-5 4-6 4-7 5-2 5-3 5-4 5-5 5-6 5-7 S8S9S7S5S15S5 S13 (1G14G) (15G) PATTERN AREA S1 S12S6

23、 1a1a1a2a2a2a2a1a S10S11 S2 S3 S3 S2 S4 g d a f e b c (18G16G) d a f e b c p nr j h gm k 169 V4001 : 18-MT-11GNK (OPERATION P.C.B.) 66 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 ANODE CONNECTION 1G14G 1-1 2-1 3-1 4-1 5-1 1-2 2-2 3-2 4-2 5-2 1-3 2-3 3-3 4-3 5-3 1-4 2-4 3-4 4-4 5-4 1-5 2-5 3-5

24、 4-5 5-5 1-6 2-6 3-6 4-6 5-6 1-7 2-7 3-7 4-7 5-7 S1 18G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m 2g 2c 2e 2r 2p 2n 2d S12 S10 S11 15G S5 S7 1d 2d S2 1e 2e S3 1c 2c S4 1g 2g 1f 2f 1b 2b 1a 2a S6 S13 16G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m 2g 2c 2e 2r 2

25、p 2n 2d 17G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m 2g 2c 2e 2r 2p 2n 2d S8 S9 S15 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 RX-V673/HTR-6065 67 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-60

26、65/ RX-A720 RX-A720 Note : 1) F1, F2 . Filament pin 2) 1G18G . Grid pin 3) P1P36 . Anode pin 4) NP . No pin 5) NX . No extended pin Pin No. Connection Pin No.69 F2 F2 68 67 NP 66 NP 65 P1 64 P2 63 P3 62 P4 61 P5 60 P6 59 P7 58 P8 57 P9 56 P10 55 P11 54 P12 53 P13 52 P14 51 P15 50 P16 49 P17 48 P18 4

27、7 P19 46 P20 45 P21 44 P22 43 P23 42 P24 41 P25 40 P26 39 P27 38 P28 37 P29 34 P32 33 P33 32 P34 31 P35 30 P36 29 28 NXNX 27 NX 26 NX 25 NX 24 NX 23 NX 22 18G 21 17G 20 16G 19 15G 18 14G 17 13G 16 12G 15 11G 14 10G 13 9G 12 8G 11 7G 10 6G 9 5G 8 4G 7 3G 6 2G 5 1G 4 NP 3 NP 36 P30 35 P31 21 F1F1 Conn

28、ection PIN CONNECTION GRID ASSIGNMENT 2G1G3G4G5G6G7G11G10G9G8G12G13G14G 15G17G16G17G18G 1-12-13-14-15-1 1-2 1-3 1-4 1-5 1-6 1-7 2-2 2-3 2-4 2-5 2-6 2-7 3-2 3-3 3-4 3-5 3-6 3-7 4-2 4-3 4-4 4-5 4-6 4-7 5-2 5-3 5-4 5-5 5-6 5-7 3a3bV1S1S3S1 S2 (1G14G) (15G) PATTERN AREA U1 A1A4 1a1a1a2a2a2a A2A3 V18 V17

29、 V17 V18 V16 V8V1 V5 V2 V7 V6 V3 V4 V15 V12 V9 V14 V13 V10 V11 (18G16G) d a f e b c p nr j h gm k 169 V4001 : HNA-18MM03T (OPERATION P.C.B.) 68 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 ANODE CONNECTION 1G14G 1-1 2-1 3-1 4-1 5-1 1-2 2-2 3-2 4-2 5-2 1-3 2-3 3-3 4-3 5-3 1-4 2-4 3-4 4-4 5-4 1-

30、5 2-5 3-5 4-5 5-5 1-6 2-6 3-6 4-6 5-6 1-7 2-7 3-7 4-7 5-7 U1 18G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m 2g 2c 2e 2r 2p 2n 2d A1 A2 A3 15G S1 V1 V5 V12 V18 V6 V13 V17 V4 V11 V16 V8 V15 V7 V14 V3 V10 V2 V9 A4 S2 16G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m

31、 2g 2c 2e 2r 2p 2n 2d 17G 1a 1h 1j 1k 1b 1f 1m 1g 1c 1e 1r 1p 1n 1d 2a 2h 2j 2k 2b 2f 2m 2g 2c 2e 2r 2p 2n 2d 3a 3b S3 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 RX-A720 69 RX-V673/HTR-6065/RX-A720 RX-V673/HT

32、R-6065/ RX-A720 IC DATA IC921: D80YK113CPTP400 (DIGITAL P.C.B.) Digital signal processor PLL/Clock Generator w/OSC Memory Protection I/O Protection C674xTM DSP MICRO- PROCESSOR Power/Sleep Controller Pin Multiplexing RTC/ 32-KHz OSC GPIO EDMA3 DMASerial Interface External Memory Interface Control Ti

33、mers Connectivity Shared Memory Audio Ports dMAX System Control Peripherals Input Clock(s) JTAG Interface Switched Control Resource (SCR) DSP Subsystem AET 256 KB L2 RAM 32 KB L1 Pgm 32 KB L1 RAM 1024 KB L2 ROM 128 KB RAM General- Purpose Timer General- Purpose Timer (Watchdog) McASP w/FIFO UARTI2CS

34、PI eHRPWMeQEP HPI USB2.0 OTG Ctlr PHY MMC/SD (8b) EMIFA(8b/16b) NAND/Flash 16b SDRAM EMIFB SDRAM Only (16b/32b) eCAP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 50 49 48 47 46 45 56 55 54 53 52 51 62 61 60 59 58 57 68 67

35、66 65 64 63 72 71 70 69 75 74 73 79 80 78 77 76 81 84 83 82 88 87 86 85 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 128 127 126 125 124 123 132 131 130 129 122 121 120 119 118 117 116 115 114 113 112 111 110 109 165 166 167 168 169 170 171 172 173 174 175 176 133 134 135 136

36、 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 AXR10/GP40 UART0_RXD/I2C0_SDA/TM64P0_IN12/GP58/BOOT8 UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP59/BOOT9 SPI0_SCS0/UART0_RTS/EQEP0B/GP54/BOOT4 SPI0_ENA/UART0_CTS/EQEP0A/GP53/BOOT3 SPI1_SOMI0/I2C1/

37、SCL/GP55BOOT5 SPI1_SIMO0/I2C1/SDA/GP56BOOT6 SPI1_CLK/EQEP1S/GP57BOOT7 SPI0_SOMI0/EQEP0I/GP50BOOT0 SPI0_SIMO0/EQEP0S/GP51BOOT1 EMA_WAIT0/UHPI_HRDY/GP210 EMA_CS3/AMUTE2/GP26 EMA_OE/UHPI_HDS1/AXR013/GP27 EMA_CS2/UHPI_HCS/GP25/BOOT15 EMA_A1/MMCSD_CLK/UHPI/HCNTL0/GP11 EMA_A2/MMCSD_CMD/UHPI/HCNTL1/GP12 EM

38、A_D0/MMCSD_DAT0/UHPI_HD0/GP00/BOOT12 EMA_D1/MMCSD_DAT1/UHPI_HD1/GP01 EMA_D2/MMCSD_DAT2/UHPI_HD2/GP02 EMA_D3/MMCSD_DAT3/UHPI_HD3/GP03 EMA_D4/MMCSD_DAT4/UHPI_HD4/GP04 EMA_D5/MMCSD_DAT5/UHPI_HD5/GP05 EMA_D6/MMCSD_DAT6/UHPI_HD6/GP06 EMA_D7/MMCSD_DAT7/UHPI_HD7/GP07/BOOT13 EMA_WE/UHPI_HRW/AXR012/GP23/BOOT

39、14 EMB_CAS EMB_WE EMB_WE_DQM0/GP515 EMB_D7/GP67 EMB_D5/GP65 EMB_D4/GP64 EMB_D3/GP63 EMB_D2/GP62 EMB_D1/GP61 EMB_D0/GP60 EMB_D15/GP615 EMB_D14/GP614 EMB_D13/GP613 EMB_D12/GP612 EMB_D11/GP611 EMB_D10/GP610 EMB_D9/GP69 EMB_D8/GP68 EMB_A12/GP313 EMB_A11/GP713 EMB_A9/GP711 EMB_A8/GP710 EMB_A7/GP79 EMB_A6

40、/GP78 EMB_A5/GP77 EMB_A4/GP76 EMB_A3/GP75 EMB_A10/GP712 AXR00/AFSR2/GP30 AXR01/ACLKX2/GP31 AXR02/AXR23/GP32 AXR03/AXR22/GP33 AXR04/AXR21/GP34 AXR05/AFSX2/GP35 AXR06/ACLKR2/GP36 AXR07/GP37 AXR08/GP38 UART1_RXD/AXR09/GP39 UART1_TXD/AXR010/GP310 AHCLKX0/AHCLKX2/USB_REFCLKIN/GP211 ACLKX0/ECAP0/APWM0/GP2

41、12 AFSX0/GP213/BOOT10 AHCLKR0/GP214/BOOT11 AFSR0/GP312 ACLKR0/ECAP1/APWM1/GP215 AMUTE1/EHRPWMTZ/GP414 RSV2 USB0_VDDA12 USB0_VDDA18 USB0_VDDA33 PLL0_VDDA PLL0_VSSA OSCIN OSCVSS OSCOUT RESET RTC_XI RTC_CVDD TRST TMS TDI TCK TDO GP714 AHCLKX1/EPWMQB/GP314 ACLKX1/EPWMQA/GP315 ACLKR1/ECAP2/APWM2/GP412 AF

42、SR1/GP413 AXR18/EPWM1A/GP48 AXR17/EPWM1B/GP47 AXR16/EPWM2A/GP46 AXR15/EPWM2B/GP45 AXR14/EQEP1B/GP44 AXR13/EQEP1A/GP43 AXR12/GP42 AXR11/GP41 AFSX1/EPWMSYNCI/EPWMSYNC0/GP410 USB0_DP USB0_DM NC NC AXR011/AXR20/GP311 EMB_BA1/GP70 EMB_BA0/GP71 EMB_CS0 EMB_RAS EMB_A2/GP74 EMB_A1/GP73 EMB_A0/GP72 EMB_WE/DQ

43、M1/GP514 EMB_CLK EMB_SDCKE EMB_D6/GP66 AXR110/GP510 AXR111/GP511 SPI1_ENA/UART2_RXD/GP512 SPI0_CLK/EQEP1I/GP52BOOT2 SPI1_SCS0/UART2_TXD/GP513 DVDD DVDD DVDD DVDD DVDD EMA_BA0/GP114 EMA_A0/GP10 EMA_A10/GP110 EMA_A3/GP13 EMA_A4/GP14 EMA_A5/GP15 EMA_A6/GP16 EMA_A7/GP17 EMA_A8/GP18 EMA_A9/GP19 EMA_A11/G

44、P111 EMA_A12/GP112 EMA_BA1/UHPI_HHWIL/GP113 CVDD CVDD CVDD CVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD CVDD DVDD DVDD DVDD DVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD CVDD 70 RX-V673/HTR-6065/RX-A720 RX-V673/HTR-6065/ RX-A720 Pin Function Name TYPEPULL

45、Detail of Function No.(1)(2) 1AXR10/GP40I/OIPDMcASP1 serial data 2UART0_RXD/I2C0_SDA/TM64P0_IN12/GP58/IIPUBOOT8 BOOT8IIPUUART0 receive data I/OIPUI2C0 serial data IIPUTimer0 lower input 3UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP59/IIPUBOOT9 BOOT9OIPUUART0 transmit data I/OIPUI2C0 serial clock OIPUTimer0 lo

46、wer output 4AXR110/GP510I/OIPUMcASP1 serial data 5DVDD (I/O supply)PWR3.3-V I/O supply voltage pins 6AXR111/GP511I/OIPUMcASP1 serial data 7SPI1_ENA /UART2_RXD/GP512I/OIPUSPI1 enable IIPUUART2 receive data 8SPI1_SCS0 /UART2_TXD/GP513I/OIPUSPI1 chip select OIPUUART2 transmit data 9SPI0_SCS0 /UART0_RTS

47、/EQEP0B/GP54/BOOT4I/OIPUSPI0 chip select IIPUeQEP0B quadrature input IIPUBOOT4 OIPUUART0 ready-to-send output 10CVDD (Core supply)PWR1.2-V core supply voltage pins 11SPI0_CLK/EQEP1I/GP52/BOOT2I/OIPDSPI0 clock IIPDeQEP1 index IIPDBOOT2 12SPI0_ENA /UART0_CTS/EQEP0A/GP53/BOOT3I/OIPUSPI0 enable IIPUeQEP

48、0A quadrature input IIPUBOOT3 IIPUUART0 clear-to-send input 13SPI1_SOMI0/I2C1_SCL/GP55/BOOT5I/OIPUSPI1 data/slave-out-master-in IIPUBOOT5 I/OIPUI2C1 serial clock 14SPI1_SIMO0/I2C1_SDA/GP56/BOOT6I/OIPUSPI1 data/slave-in-master-out IIPUBOOT6 I/OIPUI2C1 serial Data 15DVDD (I/O supply)PWR3.3-V I/O suppl

49、y voltage pins 16SPI1_CLK/EQEP1S/GP57/BOOT7I/OIPDSPI1 clock IIPDeQEP1 strobe IIPDBOOT7 17SPI0_SOMI0/EQEP0I/GP50/BOOT0I/OIPDSPI0 data/slave-out-master-in IIPDeQEP0 index IIPDBOOT0 18SPI0_SIMO0/EQEP0S/GP51/BOOT1I/OIPDSPI0 data/slave-in-master-out IIPDeQEP0 strobe IIPDBOOT1 19EMA_WAIT0/ UHPI_HRDY/GP210IIPUEMIFA wait input/interrupt I/OIPUUHPI ready 20CVDD (Core supply)PWR1.2-V core supply voltage pins 21EMA_CS3 /AMUTE2/GP26OIPUEMIFA Async chip select OIPUMcASP2 mute output 22EMA_OE /UHPI_HDS1/AXR013/GP2