Jvc-KDLX-330-Service-Manual 电路图 维修手册.pdf

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1、SERVICE MANUAL CD RECEIVER No.49635 Apr. 2001 COPYRIGHT 2001 VICTOR COMPANY OF JAPAN, LTD. KD-LX300/KD-LX100 KD-LX300/KD-LX100 Area Suffix JNorthern America OFFSEL 1078 91112 Difference piont KD-LX300 KD-LX100 LINE IN O X SUBWOOFER OUT O X Contents Safety preccaution Preventing static electricity Di

2、sassembly method Adjustment method Extension cord connectiong method Functions of the mechanism under the service mode Flow of functional operation until TOC read Maintenance of laser pickup Replacement of laser pickup Description of major ICs 1-2 1-3 1-4 1-13 1-14 1-16 1-18 1-19 1-19 1-2137 RadioFa

3、ns.CN 收音机爱 好者资料库 KD-LX300/KD-LX100 1-21 FAN8037 (IC661) : CD driver 1. Pin layout & Block diagram 2. Pin function 30 29 28 27 26 25 36 35 34 33 32 31 1 2 3 4 5 6 7 8 9 10 11 12 131415161718192021222324 484746454443424140393837 s w s w s w M S C M S C M S C D D D D D D T.S.D STAND BY ALL MUTE POWER S

4、AVE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I I O I I O I I O I I I I I I - I I I I I I - O CH2 op-amp input(+) CH2 op-amp input(-) CH2 op-amp output CH3 op-amp input(+) Ch3 op-amp input(-) CH3 op-amp output CH4 op-amp input(+) CH4 op-amp input(-) CH4 op-amp output(+) CH5 moto

5、r speed control CH5 forward input CH5 reverse input CH6 motor speed control CH6 forward input CH6 reverse input Signal ground CH7 forward input CH7 reverse input CH7 motor speed control Stand by Power save All mute Power supply voltage CH7 drive output(-) IN2+ IN2- OUT2 IN3+ IN3- OUT3 IN4+ IN4- OUT4

6、 CTL1 FWD1 REV1 CTL2 FWD2 REV2 SGND FWD3 REV3 CTL3 SB PS MUTE PVCC2 DO7- Pin No. Symbol I/OFunction 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 O O O - O O O O O O - O O O O - I O I I - I I O CH7 drive output(+) CH6 drive output(-) CH6 drive output(+) Power ground2 CH5 dr

7、ive output(-) CH5 drive output(+) CH4 drive output(-) CH4 drive output(+) CH3 drive output(-) CH3 drive output(+) Power ground1 CH2 drive output(-) CH2 drive output(+) CH1 drive output(-) CH1 drive output(+) Power supply voltage Regulator feedback input Regulator output Regulator reset input Bias vo

8、ltage input Signal supply voltage CH1 op-amp input(+) CH1 op-amp input(-) CH1 op-amp output DO7+ DO6- DO6+ PGND2 DO5- DO5+ DO4- DO4+ DO3- DO3+ PGND1 DO2- DO2+ DO1- DO1+ PVCC1 REGOX REGX RESX VREF SVCC IN1+ IN1- OUT1 Pin No. Symbol I/OFunction Description of major ICs RadioFans.CN 收音机爱 好者资料库 KD-LX300

9、/KD-LX100 1-22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 SW2 SW3 SW4 REST-SW LM0 LM1 DIMMER-OUT LCD-PWR VDD X2 X1 VSS XT2 XT1 RESET SW1 BUS-INT PS2 CRUISE NC NC REMOCON AVDD AVREF0 VOL1 VOL2 KEY0 KEY1 KEY2 LEVEL NC S.METER AV

10、SS W-VOL DOT-CONT AVREF BUS-SI BUS-SO BUS-SCK STAGE2 LCD-DA LCDCL Detection switch of CD mechanism Detection switch of CD mechanism Detection switch of CD mechanism Reset signal input from CD mechanism Loading motor control signal output Loading motor control signal output Dimmer signal output LCD d

11、river power supply control output H:ON Power supply terminal Connecting the crystal oscillator for system main clock Connecting the crystal oscillator for system main clock Power supply terminal Connecting the crystal oscillator for system sub clock Connecting the crystal oscillator for system sub c

12、lock System reset signal input Detection switch of CD mechanism Cut-in input for J-BUS signal Power save 2, Working together back up by H input, to stop mode Pulse signal input port for Cruise control Clock signal input for RDS RDS data input Remote control signal input Power supply terminal Power s

13、upply terminal Input for rotation volume detection pulse judgment to relation V1 Input for rotation volume detection pulse judgment to relation V2 Key control signal input 0 Key control signal input 1 Key control signal input 2 Signal input port of level meter Non connect S.Meter level input Connect

14、 to GND Subwoofer volume control analogue output Dot contrast signal output Power supply terminal J-BUS data input J-BUS data output J-BUS Clock signal I/O Initial setting Data output to LCD driver Clock output to LCD driver I I I I O O O O - - - - - - I I I I I - - I - - I I I I I I I I - O O - I O

15、 I/O I O O Pin No. SymbolI/OFunction UPD784215AGC-128 (IC701) : UNIT CPU 75 51 1 25 76 100 50 26 1.Terminal Layout 2.Pin Function (1/2) RadioFans.CN 收音机爱 好者资料库 KD-LX300/KD-LX100 1-23 43 44 45 46 47 48 49 50 51 52 53 54 55 5660 61,62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 8

16、5 86 87 88 89 90 91 92 93 94 9598 99 100 LCD-CE1 BUZZER E2PR-DA-I E2PR-DA-O E2PR-CLK BUS-I/O TM0 TM1 DM0 DM1 SD/ST LOCAL MONO CA-SW15 NC SEEK/STOP NC FM/AM PLL-CE PLL-DA PLL-CK BAND IN NC AMP KILL VSS DIMMER-IN PS1 POWER CD-ON MUTE W-LPF1 W-LPF2 W-MUTE VDD VO-DA VOL-CLK NC GVSW LCDRST LCD-CE2 DMK TM

17、K NC BUCK CCE RST TEST BUS03 DISC SEL NC Chip enable output to LCD driver BUZZER control signal output Data input terminal from EEPROM Data output terminal for EEPROM Clock signal I/O terminal with EEPROM J-BUS I/O signal terminal Tray motor negative signal output terminal Tray motor positive signal

18、 output terminal Door motor negative signal output terminal Door motor positive signal output terminal Station detector, Stereo signal input, H:Find Station L:Stereo Local ON/OFF select signal output terminal Monaural ON/OFF selecting output, H:MONO ON DOOR/TRAY open close detect switch signal input

19、 terminal Non connect Auto seek/stop selecting output, H:Seek L:Stop Non connect Selecting output for FM/AM, L:FM H:AM CE output for IC control for PLL Data output for IC control for PLL Clock output for IC control for PLL AM detect signal input Non connect Non connect Connect to GND DIMMER signal i

20、nput terminal Power supply terminal Selecting output for power ON/OFF, H:power ON Power supply control signal for CD H:CD MUTE output, L:MUTE ON Subwoofer cut off frequency output 1 Subwoofer cut off frequency output 2 MUTE output for Subwoofer Power supply terminal Data output terminal Clock signal

21、 output terminal Non connect AGC/FE/TE amp gain change terminal LCD reset signal output terminal Chip enable 2 output terminal for LCD driver Motor speed control signal output terminal Tray motor control signal output terminal Non connect Micon interface clock output terminal Command and data sendin

22、g/receiving chip enable signal output Reset signal output terminal reset at L level Connect to GND Micon interface data input/output terminal Initial setting Non connect O O I O O I/O O O O O I O O I - O - O O O O I - - - I I O O O O O O - O O - O O O O O - O O O - I/O I - Pin No.SymbolI/OFunction P

23、in Function (2/2) KD-LX300/KD-LX100 1-24 D/A A/D Servo control ROM RAM Digital equalizer automatic adjustment circuit Data slicer Sync signal protection EFMVCO CLV servo PLL TMAX Sub code decoder Audio output circuit Digital output 16 k RAM Address circuit Correction circuit 1-bit DAC PWM Clock gene

24、rator LPF Micro- controller interface DVss3 49 RO 50 DVDD3 51 DVR 52 LO 53 DVss3 54 ZDET 55 Vss5 56 BUS0 57 BUS1 58 BUS2 59 BUS3 60 BUCK 61 /CCE 62 /RST 63 VDD5 64 32 TEZI 31 TEI 30 SBAD 29 FEI 28 RFRP 27 RFZI 26 RFCT 25 AVDD3 24 RFI 23 SLCO 22 AVss3 21 VCOF 20 PVREF 19 LPFO 18 LPFN 17 TMAX 48 XVDD3

25、 47 XO 46 XI 45 XVss3 44 TESIN 43 VDD3 42 Vss3 41 DMO 40 FMO 39 AVDD3 38 SEL 37 TEBC 36 RFGC 35 VREF 34 TRO 33 FOO BCK 1 LRCK 2 AOUT 3 DOUT 4 IPF 5 VDD3 6 Vss3 7 SBOK 8 CLCK 9 DATA 10 SFSY 11 SBSY 12 /HSO 13 /UHSO 14 PVDD3 15 PDO 16 TC9490FA (IC521) : DSP 1. Pin layout & Block diagram 2. Pin functio

26、n (1/2) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 I/O O O O O O - - O O O O O O Function Bit clock output terminal L/R channel clock output terminal Audio data output terminal Digital data output terminal Correction flag output terminal Digital 3.3V power supply voltage terminal Digital GND terminal Sub

27、code Q data CRCC result output terminal Subcode P-W data read clock I/O terminal Subcode P-W data output terminal Playback frame sync signal output terminal Subcode block sync signal output terminal Playback speed mode output terminal Symbol BCK LRCK AOUT DOUT IPF VDD3 Vss3 SBOK CLCK DATA SFSY SBSY

28、/HSO KD-LX300/KD-LX100 1-25 2. Pin function (2/2) Pin No. 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 I/O O - O O I O - O - O I - I I I I I I I O O - O O O - O O - - I - I O - - O - - O - O -

29、 I/O I/O I/O I/O I I I - Function Playback speed mode output terminal PLL-only 3.3V power supply voltage terminal EFM and PLCK phase difference signal output terminal TMAX detection result output terminal Inverted input terminal for PLL LPF amp Outpuit terminal for PLL LPF amp PLL-only VREF terminal

30、 VCO filter terminal Analog GND terminal DAC output terminal for data slice level generation RF signal input terminal Analog 3.3V power supply voltage terminal RFRP signal center level input terminal RFRP signal zero-cross input terminal RF ripple signal input terminal Focus error signal input termi

31、nal Sub-beam adder signal input terminal Tracking error input terminal Tracking error signal zero-cross input terminal Focus equalizer output terminal Tracking equalizer output terminal Analog reference power supply vpltage terminal RF amplitude adjustment control signal output terminal Tracking bal

32、ance control signal output terminal APC circuit ON/OFF signal output terminal Analog 3.3V power supply voltage terminal Feed equalizer output terminal Disc equalizer output terminal Digital GND terminal Digital 3.3V power supply voltage terminal Test input terminaal System clock oscillator GND termi

33、nal System clock oscillator input terminal System clock oscillator output terminal System clock oscillator 3.3V power supply voltage terminal DA converter GND terminal R-channel data forward output terminal DA converter 3.3V power supply terminal Reference voltage terminal L-channel data forward out

34、put terminal DA converter GND terminal 1 bit DA converter zero data detection flag output terminal Microcontroller interface GND terminal Microcontroller interface data I/O terminal Microcontroller interface data I/O terminal Microcontroller interface data I/O terminal Microcontroller interface data

35、 I/O terminal Microcontroller interface clock input terminal Microcontroller interface chip enable signal input terminal Reset signal input terminal Microcontroller interface 5V power supply terminal Symbol /UHSO PVDD3 PDO TMAX LPFN LPFO PVREF VCOF AVss3 SLCO RFI AVDD3 RFCT RFZI RFRP FEI SBAD TEI TE

36、ZI FOO TRO VREF RFGC TEBC SEL AVDD3 FMO DMO Vss3 VDD3 TESIN XVss3 XI XO XVDD3 DVss3 RO DVDD3 DVR LO DVss3 ZDET Vss5 BUS0 BUS1 BUS2 BUS3 BUCK /CCE /RST VDD5 KD-LX300/KD-LX100 1-26 1314 CL-LGNDOUTLOUTRRGNDCR -CR + CL+VccINLNFLFILNFRINR 11129810 2143675 REFLREFR FILTER BA3220FV-X (IC301,IC401) : Driver

37、 1. Pin layout & Block diagram 2. Pin function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 CL+ Vcc INL NFL FIL NFR INR CR+ CR- RGND OUTR OUTL LGND CL- Powe supply terminal for amp. power supply terminal. input terminal. Negative feedback terminal. Filter terminal. Negative feedback terminal. Input terminal Pow

38、er supply terminal for amp. Output terminal of internal amp. Rch GND terminal. Rch output terminal. Lch output terminal. Lch GND terminal. Output terminal of internal amp. Pin No. SymbolFunction 000874360-T (IC702) : System reset 1. Pin layout2. Block diagram 13 2 1 Vcc 3 Vout 2 GND OP1 KD-LX300/KD-

39、LX100 1-27 BD3860K (IC911) : E. volume 1.Terminal layout 2.Bockdiagram 3.Pin function 13 12 7 8 10 11 41 42 43 44 1 2 3 4 65940363534332832313029191514 39383725242623222120181716 GNDFIL VCCSEL1 0 18 dB 0 18 dB VIN1LOUD1HF1LF1 DET1TIN1 TNF1BNF1 OUTF1 OUTR1 SI SC OUTR2 OUTF2 BOUT2BNF2TNF2TIN2BBOUT2MIX

40、2VCA2DET2LF2HF2LOUD2VIN2SEL2 D2 C2 B2 A2 D1 C1 B1 A1 BOUT1VCA1MIX1 BBOUT1 POWER SUPPLY INPUT GAIN INPUT GAIN MAIN VOLUME 0 -40 dB LOUDNESS MAIN VOLUME 0 -40 dB LOUDNESS LOW(f=50Hz) 6dB PROCESS CONTROL +3 to 12dB (f=10kHz) LOW(f=50Hz) 6dB PROCESS CONTROL +3 to 12dB (f=10kHz) TREBLE -14 +14dB TREBLE -

41、14 +14dB BASS -14 +14dB BASS -14 +14dB FADER CH1 FRONT 0 -5 dB FADER CH2 FRONT 0 -5 dB FADER CH1 REAR 0 -5 dB FADER CH2 REAR 0 -5 dB LOGIC INPUT SELECTOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 CH2 Input Pin A CH2 Input Pin B CH2 Input Pin C CH2 Input Pin D 1/2 VCC Pin Ground Pin Se

42、rial Data Receiving Pin Serial Clock Receiving Pin Power Supply Pin CH2 Rear Output Pin CH2 Front Output Pin CH1 Rear Output Pin CH1 Front Output Pin CH1 Bass Filter Setting Pin CH1 Bass Filter Setting Pin CH2 Bass Filter Setting Pin CH2 Bass Filter Setting Pin CH2 treble Filter Setting Pin CH1 treb

43、le Filter Setting Pin CH2 treble Input Pin CH2 BBE II Signal Output Pin CH2 Output MIX Amplifier Inverse Input Pin A2 B2 C2 D2 FIL GND SI SC VCC OUTR2 OUTF2 OUTR1 OUTF1 BOUT1 BNF1 BOUT2 BNF2 TNF2 TNF1 TIN2 BBOUT2 MIX2 Pin No. SymbolFunction 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

44、 43 44 CH2 High Pass VCA Output Pin CH2 Low Pass Filter Setting Pin CH2 High Pass Filter Setting Pin CH2 High Pass Attack/Release Time Setting Pin Non connect CH1 High Pass Attack/Release Time Setting Pin CH1 treble Input Pin CH1 BBE II Signal Output Pin CH1 Output MIX Amplifier Inverse Input Pin CH

45、1 High Pass VCA Output Pin CH1 Low Pass Filter Setting Pin CH1 High Pass Filter Setting Pin CH1 Loudness Filter Setting Pin CH1 Main Volume Input Pin VCH2 Loudness Filter setting Pin CH2 Main Volume Input Pin CH2 Input Gain Output Pin CH1 Input Gain output Pin CH1 Input Pin A CH1 Input Pin B CH1 Inp

46、ut Pin C CH1 Input Pin D VCA2 LF2 HF2 DET2 NC DET1 TIN1 BBOUT1 MIX1 VCA1 LF1 HF1 LOUD1 VIN1 LOUD2 VIN2 SEL2 SEL1 A1 B1 C1 D1 Pin No. SymbolFunction 1 11 33 23 34 44 22 12 KD-LX300/KD-LX100 1-28 VCCWPSCLSDA A0A1A2GND 8 Vcc 7 WP 6 SCL 5 SDA A0 1 A1 2 A2 3 GND 4 16kbit EEPROM allay 11bit 11bit 8bit Add

47、ress decoder Slave Ward Address resister Data resister START STOP ACK Control circuit High voltage osc circuit Power supply voltage det. VCC GND A0,A1,A2 SCL SDA WP - - I I I/O I Power supply. GND No use connect to GND. Serial clock input. Serial data I/O of slave and ward address. Write protect ter

48、minal. Symbol I/O Function BR24C16F-X (IC703) : EEPROM 1. Pin layout 3. Block diagram 2. Pin function 141312118109 1234756 VDDC1C4I/O4I/O3O/I4O/I3 I/O1O/I1O/I2I/O2VssC2C3 BU4066BCFV-X (IC322) : Quad analog switch 1. Pin layout & Block diagram KD-LX300/KD-LX100 1-29 2 1 11 12 10 1513 14 5 4 6 38 9 7

49、ILM AJGND C6 10u C5 0.1u C4 0.1u C3 0.1u AUDIO OUT CD OUT CTRL ANT CTRL EXT OUT ANT OUT VCCACC Surge Protector BIASTSD C1 100u C2 0.1u +B ACC BATT.DET OUT COMPOUT VDD OUT SW5VOUT ILMOUT C7 0.1u C8 0.1u R1 UNIT R: C:F note1) TAB (header of IC) connected to GND HA13164 (IC961) : Regulator 1.Terminal layout 2.Block diagram 3.Pin function Pin No.SymbolFunction 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 EXTOUT ANTOUT ACCIN VDDOUT SW5VOUT COMPOUT ANT CTRL VCC BATT DET AUDIO OUT CTRL CD OUT ILM AJ ILM OUT GND Out